ralphw@ius3.ius.cs.cmu.edu (Ralph Hyre) (11/07/88)
In article <8348@alice.UUCP> debra@alice.UUCP () writes: >In article <549@gt-eedsp.UUCP> jensen@gt-eedsp.UUCP (P. Allen Jensen) writes: >>Ok, Straight from a NeXT salesrep in response to the question: >>Q: Does the memory have a parity check bit ? >>A: "No" >>... "memory is reliable enough that the added cost was not justified." >NO. (memory is NOT reliable enough) > And this is such a religious issue that I believe it should be left up to the end user/systems integrator. Add an 'extra' SIMM socket or two for a bank of chips to be used for parity/ECC, and make sure it is jumper-or even software selectable, depending on the users taste and wealth. For some applications (like digitized speech), I might rather have 10M of 99.9999% reliable memory than 9M+parity (all Unix can do is panic) or 8M+ECC. Anyone want to design a memory controller/MMU for this? -- - Ralph W. Hyre, Jr. Internet: ralphw@ius3.cs.cmu.edu Phone:(412) CMU-BUGS Amateur Packet Radio: N3FGW@W2XO, or c/o W3VC, CMU Radio Club, Pittsburgh, PA "You can do what you want with my computer, but leave me alone!8-)"