benoitm@hpmwtd.HP.COM (Benoit Menendez) (12/15/88)
This is from the technical summary for the Motorola DSP96002:
Parallelism - The data ALU, AGUs, and program controller operate in parallel
within the CPU so that an instruction prefetch, up to three floating-point
operations, two data moves, and two address pointer updates, using one of three
types of arithmetic (linear, modulo, or reverse carry), can be executed in a
single instruction cycle. This parallelism allows 40 MFLOP peak performance.
- Ten registers each 96 bit wide
- 1024 point complex FFT in less than 2ms
- Clocked at 26.67 MHz
I am sure that somebody out there wants one for their CD player :-)
Benoit
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Benoit Menendez
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