jom@belltec.UUCP (Jerry Merlaine) (01/15/89)
If you want to do something useful with wafer scale technology, build me an IEEE floating point look-up table ROM. If you're interested, go look up 'nomography' in a good science library. It's the science of building tables of real numbers to avoid calculating functions. Using number theory manipulations, you can 'pack' values for apparently unrelated functions in the same table. Jerry O. Merlaine pacbell.com!belltec!jom
slackey@bbn.com (Stan Lackey) (01/17/89)
In article <335@belltec.UUCP> jom@belltec.UUCP (Jerry Merlaine) writes: >If you want to do something useful with wafer scale technology, build >me an IEEE floating point look-up table ROM. I have a pair of ECL floating point chips on my desk that do DP add,sub, and mul in under 60ns. Lookup tables used to sound great, but technology marches on... Watching this discussion, it looks to me like the consensus is that the large slow cheap RAM belongs in a level of the memory heirarchy between conventional DRAM and conventional disk. It was proposed to be used as RAMdisk, particularly for paging, with the intention of getting use out of it quickly; no new concepts were introduced, that would need OS's to be rewritten to get full benefit. No one wants to replace conventional DRAM's with it, because the cache TTM would go up; it can't replace disk as it would be volatle. Is it time to add a new level of the memory heirarchy to systems, and do a thorough job of defining its architecture? -Stan
colwell@mfci.UUCP (Robert Colwell) (01/17/89)
In article <34593@bbn.COM> slackey@BBN.COM (Stan Lackey) writes: >In article <335@belltec.UUCP> jom@belltec.UUCP (Jerry Merlaine) writes: >>If you want to do something useful with wafer scale technology, build >>me an IEEE floating point look-up table ROM. > >I have a pair of ECL floating point chips on my desk that do DP add,sub, >and mul in under 60ns. Lookup tables used to sound great, but >technology marches on... True for some floating point ops, but some decently large lookup tables would still be awfully handy for sin, cos, exp, pow, etc. >... >Is it time to add a new level of the memory heirarchy to systems, and do >a thorough job of defining its architecture? Talk about your truly radical new ideas. Can you imagine getting comp.arch to come to a consensus on exactly how to tie a new memory hierarchy into a generic computer ISA, including its control or interactions with the compiler or compilers? There'd be so much fur flying that the animal rights activists would boycott everyone's computers. Bob Colwell ..!uunet!mfci!colwell Multiflow Computer or colwell@multiflow.com 175 N. Main St. Branford, CT 06405 203-488-6090
mac@mrk.ardent.com (Michael McNamara) (01/18/89)
In article <34593@bbn.COM> slackey@BBN.COM (Stan Lackey) writes: |In article <335@belltec.UUCP> jom@belltec.UUCP (Jerry Merlaine) writes: |>If you want to do something useful with wafer scale technology, build |>me an IEEE floating point look-up table ROM. | |I have a pair of ECL floating point chips on my desk that do DP add,sub, |and mul in under 60ns. Lookup tables used to sound great, but |technology marches on... |-Stan How fast do they do a square root? exponential? how about ATAN2 ? A lookup table that gets you close to the answer in 150ns followed by a 3-4 term polynomial (Running on your 60ns parts, perhaps) is how we do trancendental functions these days... Implementing the same T.F. with just + - * can take hundreds of cycles. Michael McNamara mac@ardent.com
jesup@cbmvax.UUCP (Randell Jesup) (01/18/89)
In article <34593@bbn.COM> slackey@BBN.COM (Stan Lackey) writes: >be rewritten to get full benefit. No one wants to replace conventional >DRAM's with it, because the cache TTM would go up; it can't replace disk >as it would be volatle. Add battery backup. -- Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup