mark@mips.COM (Mark G. Johnson) (02/12/89)
In article <20386@shemp.CS.UCLA.EDU> loving@CS.UCLA.EDU (Mike Loving) writes: >Are there any articles concerning the Motorola 88K out that anyone could >point me too? Thanx in advance. The back cover of _IEEE Micro_ magazine says that the April, 1989 issue will contain a "Special feature: Mororola's 88000 RISC". Although the article hasn't been published yet, we can speculate that it will cover some of the material that M88k folks have touched upon briefly here on comp.arch. Such as, perhaps, * Tradeoffs in using the 32 general purpose registers for both integer and floating point operands * Benefits and/or drawbacks of register scoreboarding * Cost/benefits of installing floating point HW on same chip as integer RISC central processor * Effects of pipelined FP op units and multiple FP operations in progress: Number of register read & write ports, FP load/store bandwidth, etc. Comparison of throughput vs latency. There's been one article already published, I *think* in _VLSI_Systems_Design, covering the nuts and bolts of how they built the 88k, including the use of silicon compilers, RTL simulation, and so forth. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086 ...!decwrl!mips!mark (408) 991-0208
mslater@cup.portal.com (Michael Z Slater) (02/13/89)
> request for articles on 88K
The May issue of Microprocessor Report has a detailed article on the 88K, and
the June issue has an article on the 88200 CMMU. Both articles are also
included in our "Understanding RISC Microprocessors" reprint collection.
Michael Slater, Editor and Publisher, Microprocessor Report
550 California Ave., Suite 320, Palo Alto, CA 94306 415/494-2677
email: mslater@cup.portal.com fax: 415/494-3718