[comp.arch] D-cache usefulness

schow@bnr-public.uucp (Stanley Chow) (02/16/89)

In article <3682@geaclib.UUCP> daveb@geaclib.UUCP (David Collier-Brown) writes:
>  [David would like cheap D-Cache kits so he can build large caches].
>	I want a machine with performance somewhat better than my
>Stunned despite my stuffing it to bursting with slow main-memory
>chips.  I want an architecture which will deal with large working
>sets and ill-behaved (not very local) reference patterns without
>having to sweep the slowdown under the rug by running large numbers
>of users/processes in a timesharing system.
>	I'd like the opportunity to do this at finite cost in the
>near future by allowing me to bite the bullet and put in lots of
>cache in front of a rather huge but not-too-fast main memory.  I
>really do want lots of memory, and am betting that the difference in
>memory speed/cost versus processor speed/cost makes investing in
>cache worthwhile.  
>
>	The assumption I'm making, you see, is that it's worthwhile
>to allocating particular cache chips to particular blocks of memory
>chips.  Probably along paging boundaries.  This in turn means that
>I'm betting that cache invalidation/reloading on process change is a
>major bottleneck when one has large amounts of cache.  This in turn
>means that I'm still betting on simple multiprocessing for this kind
>of application domain.  

If you application has large working sets (I assume you mean many
times larger than a reasonable D-Cache - say 256K bytes), with  
ill-behaved reference patterns, why  do you think D-Cache will
give you performance with slow main memory?

For a large system, memory and I/O will often limit performance
purely on economics: the CPU can be very fast, but you can't afford
the fast memory or fast disk (or your customers won't buy). If you 
are willing to go to the trouble of dedicating cache sections for
particular process/memory, why not turn the cache into simple 
SRAM and statically allocate the SRAM?

If you mean partition the cache on a per process basis so that
you can save on proces change time, I would think you will run
out of cache partitions pretty quick or have pretty small partitions.

Please, no dicussions on RISC/CISC suitability. This is strictly
a question on the Data side of things.


Stanley Chow  ..!utgpu!bnr-vpa!bnr-fos!schow%bnr-public
	      (613) 763-2831

Disclaimer: Just because I am working on architecture and  
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