robison@m.cs.uiuc.edu (02/17/89)
There was a blurb on Intel's N-10 processor in the Chicago Tribune today. It was announced at the Int. Solid State Circuits Conference. The only technical info in the Tribune is that the N-10 is a 64-bit processor with a five times bigger than usual chip size, and does 150 MIPS. (Whatever that means!) What's the N-10's architecture? Floating point? Vector? MIMD? Just really fast transistors? Enquiring minds want to know. Arch D. Robison University of Illinois at Urbana-Champaign CSNET: robison@UIUC.CSNET UUCP: {pur-ee,convex}!uiucdcs!robison ARPA: robison@CS.UIUC.EDU (robison@UIUC.ARPA)