[comp.arch] Flexible Processors and Hardware

mautner@odin.ucsd.edu (Craig Mautner) (02/18/89)

I am currently preparing a paper for a course that I am taking in
comoputer architectures.  This paper concerns itself with the flexible
processor concept based on dynamically programmable logic arrays (e.g.
XILINX XC3020 Logic Cell Arrays).  

Dynamically programmable logic arrays allow the user to 
reconfigure hardware as easily (potentially) and as often as 
writing to memory.  A little bit of brainstorming has produced
the list below of possible applications of this technology:
	
	- dynamic pipeline delays which would allow the program to
		insert delays in a pipelined processor in order to 
		get 100% utilization of a given stage.  Which stage
		to delay would depend on the function that the 
		processor is working on.
	- j to k way set associativity in caches.  Rather than fixed 
		k-way set associativity, each process can redefine 
		the cache to match its working set.  At context swap, 
		the cache would then also be reconfigured.
	- fault tolerance.  The gate array offers considerable 
		redundancy.  Failures can be stored in a boot file
		which can be reloaded at boot time to bring the
		chip up correctly the first time.
	- dynamic crossbar switches between multiple processors.

There are many more applications that could benefit from this 
flexibility and I am sure that somebody has reasons why not all
of my brainstorming above can be implemented.  I am interested in
hearing what people have to say about this.

So far the only article I have found which directly references 
this type of architecture has been the paper "Flexible Processors:
A promising application-specific processor design approach" 
by A. Wolfe and J. P. Shen of Carnegie Mellon, in proceedings
of MICRO 21.  This paper discusses a Flexible Processor which 
is designed for floating point computations
with complex data structures.  In the system they built: "over 75% of
the microinstruction fields and a large portion of the data path is
undefined until configuration" which is coincident with
program loading. 

I am looking for more articles and other source materials 
(including e-mail and Usenet correspondence) which might relate to
this subject.  I will be happy to mail or post the results of 
this survey if anyone requests it.


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Craig D. Mautner		UCSD
mautner@cs.ucsd.edu		Dept of CSE, C-014