[comp.arch] General-purpose architectures and symbolic languages

baum@Apple.COM (Allen J. Baum) (02/23/89)

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>In article <7051@polya.Stanford.EDU> wilson@carcoar.Stanford.EDU (Paul Wilson) writes:
>Even if the Newest generation won't fit in the cache, you should be
>able to avoid swapping a lot of cache blocks out by telling the cache
>hardware if they only contain garbage.  (i.e., force them to appear
>clean, so they won't be written back, or tell the cache to "create"
>a block without actually reading in the corresponding block from
>main memory).  It seems that this would cut cache-memory traffic by
>approximately half (?) for the Newest generation.
>

Both IBM and HP have patents on that sort of thing:
4,719,568  Hierarchical memory system including separate cache memories
          for storing data and instructions (IBM)
4,713,755  Cache memory consistency control with explicit software instructions
           (HP)
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