rnd@edsdrd.eds.com (Randy Diffenderfer) (02/22/89)
In article <1226@husc6.harvard.edu>, reiter@babbage.harvard.edu (Ehud Reiter) writes: > ... > This contrasts with the > IBM 370-class machines, which suffer greatly from lack of address space, > which *is* very much an annoyance to the programmer and even the end-user. In the 'olden' days [pre-XA or pre-ESA], this was significantly true. I think IBM jocks would defend XA's 2GB/as and ESA's 4TB (can you say "how the h*** can I afford the backing store?") as having relieved that annoyance. NOW the annoyance is figuring out how to efficiently use the room! :-) -- Randy Diffenderfer - Electronic Data Systems | Michigan seems like rnd@edsdrd.eds.com | a dream to me now... USENET: ... {rutgers!rel,uunet}!edsews!edsdrd!rnd
hascall@atanasoff.cs.iastate.edu (John Hascall) (02/23/89)
In article <123@endeavor.edsdrd.eds.com> rnd@edsdrd.eds.com (Randy Diffenderfer) writes: >In article <1226@husc6.harvard.edu>, reiter@babbage.harvard.edu (Ehud Reiter) writes: >> ... >> This contrasts with the >> IBM 370-class machines, which suffer greatly from lack of address space, >> which *is* very much an annoyance to the programmer and even the end-user. >In the 'olden' days [pre-XA or pre-ESA], this was significantly true. >I think IBM jocks would defend XA's 2GB/as and ESA's 4TB (can you say >"how the h*** can I afford the backing store?") as having relieved that >annoyance. NOW the annoyance is figuring out how to efficiently use the >room! :-) Well, the register-displacement addressability scheme is still a pain in the *ss. For those of you not familiar with the IBM/3x0 scheme, basically all memory is accessed via a register and a displacement (sounds not too bad so far...), BUT, the displacement is only 12 bits! You can only address 4K per base register!! First it was "8 ENIACS (or whatever) will be enough for all the computing needs of the world forever", then "4K! who could use 4K??", etc... Have we learned yet? John Hascall ISU Comp Center
johnl@ima.ima.isc.com (John R. Levine) (02/24/89)
In article <834@atanasoff.cs.iastate.edu> hascall@atanasoff.cs.iastate.edu (John Hascall) writes: > Well, the register-displacement addressability scheme is still a > pain in the *ss. > > For those of you not familiar with the IBM/3x0 scheme, basically > all memory is accessed via a register and a displacement (sounds > not too bad so far...), BUT, the displacement is only 12 bits! > You can only address 4K per base register!! > ... "4K! who could use 4K??", etc... Have we learned yet? Give them more credit than that. There were a bunch of interesting articles in the IBM Systems Journal in 1964 that gave much of the rationale for the design of the 360. It also has a complete description of the architecture in a dialect of APL. They knew that 4K offsets were too small. As I recall their explanation went like this: they wanted executable code to be relocatable, so they provided lots of base registers. They were worried that if the offsets were 16 bits, people would be tempted to write their programs with all direct addresses, assuming that nobody would ever put more than 64K on a computer, and that would make them break on larger machines. 4K offsets made sure you used a base register. It also appears from the article that some of the designers were under the impression that by forcing you to use base registers they didn't need address translation since they could change the base registers when they moved a program. Evidently they forgot that programs keep most of their addresses in memory where they are much less easy to change. (This would seem implausibly naive if there weren't in the same issue an article proudly explaining the swell way they sped up the floating point, but they didn't realize they had ruined the accuracy thereby.) The address space shortage is as much of an operating system problem as a hardware problem. They knew in 1964 that 24 address bits would eventually be insufficient, but it would be enough for quite a while, at least 10 years, before they ran out. In the meantime there was a definite cost saving from not having to implement address bits on the low end machines that they knew they'd never use. (The model 30 only had an 8-bit data path, so 3 rather than 4 byte addresses made address arithmetic faster, I believe.) I suspect the hardware guys were as horrified as anyone else when the rather peculiar management of the OS/360 effort caused the high byte of addresses to be used for all sorts of hard-to-change things. The original question, though, was why people buy 370s in the first place. The answer is peripherals, I/O bandwidth, and to some degree specialized systems software. If you are an airline and need an online reservations system with a thousand gigabytes of disk and a throughput of several thousand transactions per second, you don't have much choice. IBM's systems have always had high-performance I/O channels and peripherals, and the operating systems let you take advantage of them albeit unpleasantly. Nobody has trouble keeping a tape drive running at full speed under MVS. (If anyone is about to propose a distributed network of small machines for large data base applications, I can offer some suggestions why it won't work.) -- John R. Levine, Segue Software, POB 349, Cambridge MA 02238, +1 617 492 3869 { bbn | spdcc | decvax | harvard | yale }!ima!johnl, Levine@YALE.something You're never too old to have a happy childhood.
mo@prisma (02/24/89)
A sucessful realization of 32-bit PDP-11-ness looks much more like the National 32K than the Vax. -Mike