snoopy@sopwith.UUCP (Snoopy) (03/18/89)
In article <21570@shemp.CS.UCLA.EDU> marc@cs.ucla.edu (Marc Tremblay) writes: |For your information the instruction cache on the Motorola 68030 |is not any bigger than the data cache (both can hold 256 bytes). |According to Digital Design, "Simulations show that, if burst filling |of the caches is used, a hit rate of 80% is achievable on the instruction |cache and about 48% on the data cache". The article does not mention |which programs were run to obtain these numbers. These numbers and |other studies show that a larger data cache is not a dumb idea. |The hit ratio for the instruction cache is usually larger than |for the data cache because of better locality, thus a larger data |cache makes sense. Of course a larger data cache makes sense. A larger data cache would always make sense. The question is, "Is a larger data cache the best use of the available silicon real estate?" Let's pretend that we have just enough room to double one of the caches on the 68030 to 512, but not both. What we want to do is see which cache would give us the most performance increase when doubled in size. So you run billions of benchmarks and 'typical' programs, and if the icache hit rate would increase to 95% while the dcache hit rate only increased to 49% then you would increase the icache, right? And if the icache hit rate only went up to 81% but the dcache hit rate went up to 63% then you would increase the dcache. _____ /_____\ Snoopy "My dot-matrix does Postscript." /_______\ |___| tekecs.wv.tek.com!sopwith!snoopy qiclab!sopwith!snoopy |___| sun!nosun!illian!sopwith!snoopy parsely!sopwith!snoopy