elg@killer.Dallas.TX.US (Eric Green) (03/11/89)
in article <7287@spool.cs.wisc.edu>, shekita@provolone.cs.wisc.edu (Eugene Shekita) says: > While we're on the subject of looking back, forward, etc., I was wondering > how much you architects out there worry about our microprocessor market > falling prey to Japan. They've squashed our masking tools market, the DRAM > market, and they seem to have better production yields, so isn't the next > logical step the microprocessor market? Yes, and, in fact, they're going after it. The biggest Japanese microprocessor exporter right now seems to be NEC, with its V-series chips. Now that the Intel suit is over, you can expect to see a lot of design-ins. The Japanese seem to be going more after the high-end microcontroller market than the systems market. Or maybe that's just what they're most effective at. For example, my brother's company is designing-in the V25 into their top-end data aquisition product. The V25 has everything but RAM and ROM onboard for such an application -- it has 24 i/o lines, 8 analog inputs, two UARTs, interrupt controller, 2 DMA channels, DRAM refresh, etc. etc. all in an 84-pin package. And in low power CMOS -- under 50ma, a prime consideration when the thing has to be solar-powered. That level of integration one of the reasons they're using it. The other reasons: its performance is more than adequate for most applications, and, best of all, it is 8086 instruction-set-compatible. I cannot stress how much instruction set compatibility means to a smaller company making specialty products. If it is 68K or 8086-compatible, they can use off-the-shelf development systems and "C" compilers. If they wanted to use the 29K, on the other hand, (as if an adequately integrated version of any RISC chip existed for imbedded markets) they'd have to buy an upteen-K$ development system, which they'd then have to spend weeks learning. I think CSI spent about $5K on their initial design stage, including buying new PCB layout software and hiring an additional engineering tech to do the layout, final schematic, and (when the time comes) fabrication. And did it in less than three weeks, INCLUDING software, due to the instruction-set compatibility -- they had previously done PC-based data aquisition products, and most of their (Microsoft "C") code was easily modified for the new environment. I suspect total development time will be under three months, because the engineers are familiar with the application and the development environment... > pipelining, etc. are pretty well understood at this point. Seems like the > winners in the near future will be the ones who can pack the most on one > chip (witness the N-10) and still get decent yields. The Japanese are > obviously well-positioned to do just this. Yep! (see above). > On top of everything else, many of the Japanese computer companies > are hugh and will be far less effected by industry slow-downs. They also > have gobs of money to spend on research, which allows them to go out > on a limb with technologies that could have a big payback. The Japanese rarely go out on a limb with "unsafe" technologies. Even their most noted innovator, Sony, generally only takes existing technology and brings it to a marketable form. Their advantage is that they are more long-term oriented, and won't put off innovation in order to improve the short-term bottom-line. For example, the high-end Japanese autos have 16-valve engines, multi-point fuel injection, and four-wheel independent suspension. None of those are "revolutionary" technologies -- 4 valve cylinders have been used in motorcycles for years, and expensive Euro-cars have long had fuel injection and independent suspension. But all of these technologies were late to be adopted by Detroit, because the American automakers were "running scared"... they were having enough trouble with redesigning their entire car lines and making capital investments to bring their factories into the '80s after a decade of neglect (the '70s saw no innovation at all from Detroit, nothing like the massive redesign of the '80s that has resulted in most Detroit cars being front wheel drive and 2,000 pounds lighter than in 1970). > So how much do you guys worry? If you believe that the Japanese will > never overtake our microprocessor market (we're talking a 10-year horizon), > then I'd be curious to hear why. Of course, I hope it doesn't I don't think they'll overtake our "systems" markets. Intel and Motorola come out with new "standard" processors faster than the Japanese can catch up, in that market, and the Japanese don't have the software clout to go non-standard (i.e., RISC). But I do think that in the embedded processor market, they're going to mop up. Their highly-integrated code-compatible processors simply are more cost effective than what American companies, beglamored by the flashy systems market, are putting out. -- | // Eric Lee Green P.O. Box 92191, Lafayette, LA 70509 | | // ..!{ames,decwrl,mit-eddie,osu-cis}!killer!elg (318)989-9849 | | \X/ amoy mi amiga, pero no me gusta bazofia-DOS. |
lfoard@wpi.wpi.edu (Lawrence C Foard) (03/12/89)
In article <21572@shemp.CS.UCLA.EDU> loving@cs.ucla.edu (Mike Loving) writes: >>lot of stuff about foreign languages deleted > >I personally think that it is sad that so few people in the US speak >ANY foreign language. I think that requiring two foreign languages for >a Ph.D. is a bit extreme but I think one would be a good thing. >..... Maybe two computer langauges should be required for a PHD in foriegn langauge ;) Not every one has equal abilitys in every thing, I really think it is unfair to deprive some one of the opportunity to use there talents, just because some one decided it would be a nice idea for every one to know a foriegn langauge. Before using course requirments as the magic solution to all the worlds problems consider how you would feel if the only thing standing between you and what you wanted to do was an arbitrary requirment to do something you could not do. The sad thing is that the very people who will be unable to complete an arbitrary set of degree requirments are the very people who also have a chance to advance the field they are good in. Learning disabilitys and creativity tend to come together. Although I think it would be nice if all artists and writers knew how to program I don't go out insisting that they should be required to do this. -- Disclaimer: My school does not share my views about FORTRAN. FORTRAN does not share my views about my school.
gld@CUNIXD.CC.COLUMBIA.EDU (Gary L Dare) (03/13/89)
In article <21572@shemp.CS.UCLA.EDU> Mike Loving wrote: > >I personally think that it is sad that so few people in the US speak >ANY foreign language. I think that requiring two foreign languages for >a Ph.D. is a bit extreme but I think one would be a good thing. When I got moved to Montreal for a summer job, I was a victim of English-canadian high school french (i.e., I was totally useless) but found that acquiring a new language helped me ferret out a lot of useful information (esp. Telecommunications stuff in French) as well as expanding my cultural horizons, in everyday life and (in my case) as a Canadian. The trick is to find a new language that is appealing to your psychological make-up. I think that North Americans have an advantage at learning new languages because the base of our culture is a synthesis of other cultures . . . and it's still changing, with the advent of Asian tongues and (in the US) Spanish. gld PS: I think this discussion should move to comp.misc as we are out of the architecture discussion . . . -- ~~~~~~~~~~~~~~~~~~~~~~~~ je me souviens ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Gary L. Dare > gld@eevlsi.ee.columbia.EDU > gld@cunixd.cc.columbia.EDU "I AM SALMAN RUSHDIE" > gld@cunixc.BITNET
chip@vector.UUCP (Chip Rosenthal) (03/16/89)
In article <2851@eos.UUCP> eugene@eos.UUCP (Eugene Miya) writes: >In article <7287@spool.cs.wisc.edu> shekita@provolone.cs.wisc.edu (Eugene Shekita) writes: >>I was wondering how much you architects out there worry about our >>microprocessor market falling prey to Japan. >They have several micro-processor based projects projects, but they are >moving cautiously. The problem is that memories are the traditional vechicle for process development. Several reasons for this. Memories are denser than uP's, and therefore are more susceptible to defects. To project target yields, IC companies generally develop a curve for a process based on die area. Different curves (or fudge factors) are used for memories and uP's. Second, you really tend to push the layout rules and process parameters in a memory to make that memory cell as compact as possible. A small gain in one cell yields big gains on the die when you step and repeat it 256K...or 1M...or 4M times. Therefore, memories tend to force you to develop and support aggressive design rules. The importance of this is cost. A better process gives you better yielding dice and lets you shrink to get more dice on that wafer. So, you can discuss the issue of uP's from a viewpoint of design and architectural dominance, which is probably the issue of greatest interest to readers here. However, process dominance can lead to ownership of the merchant uP and controller market, and these "less interesting" processors are the bread and butter which fuel R&D on advanced processors. This is what makes the recent Intel/NEC copyright decision so interesting. >Remember Pearl Harbor. Remember the Alamo. I am serious. I now think >we live in a racist society contrary to what I was taught to believe. Japan bashing is in vogue. And unfortunate. It hides the real issues. -- Chip Rosenthal chip@vector.UUCP | Choke me in the shallow water Dallas Semiconductor 214-450-5337 | before I get too deep.
sccowan@watmsg.waterloo.edu (S. Crispin Cowan) (03/16/89)
In article <728@vector.UUCP> chip@vector.UUCP (Chip Rosenthal) writes: >So, you can discuss the issue of uP's from a viewpoint of design and >architectural dominance, which is probably the issue of greatest interest >to readers here. However, process dominance can lead to ownership of the >merchant uP and controller market, and these "less interesting" processors >are the bread and butter which fuel R&D on advanced processors. > >This is what makes the recent Intel/NEC copyright decision so interesting. >-- >Chip Rosenthal chip@vector.UUCP | Choke me in the shallow water >Dallas Semiconductor 214-450-5337 | before I get too deep. I seemed to have missed something here (*(^%& course work load :-); what _was_ the Intel/NEC decision result? I've seen several posters refer to it in passing in the last few days, but no discussion of the actual result. Crispin ---------------------------------------------------------------------- Login name: sccowan In real life: S. Crispin Cowan Office: DC3548 x3934 Home phone: 888-6375 Post Awful: 280 Phillip St., Apt. B1-15 Waterloo, N2L 3X1 UUCP: watmath!watmsg!sccowan Domain: sccowan@watmsg.waterloo.edu "Home is where your munchies are." -me
matloff@witch.Berkeley.EDU (Norman Matloff) (03/22/89)
In article <2851@eos.UUCP> eugene@eos.UUCP (Eugene Miya) writes: >Dave "Steve" Stevenson was just here. We, including Norm Matloff, >Daryl Long, and others have been talking about a foreign language requirement >for CS majors. What do you think, full sensory overload? Too much? >A PhD in math frequently requires 2 foreign languages (typically Russian >and German), see what distinguishes academics from industry? >Learn some Japanese. Eugene, you have a better memory than I do. I don't remember saying that, but since I do agree with the sentiment, I must have said it. :-) 2 languages is too much, but I think that 1 is quite reasonable. Note that reading CS in a foreign language is a lot harder than reading Math, so that would be another reason to keep it down to only 1 language. Eugene's points about our insularity are well-taken. But I personally am more concerned more about the quality of engineers the U.S. is producing. I know one person who is a well-regarded software engineer in a prominent Silicon Valley firm who thinks that all machines have the same machine language (no, this is NOT a joke). That's an extreme case, granted, but I do feel that there are a lot more of the weaker-level people in the industry these days than there used to be, both in hardware and systems software. [No one who reads comp.arch is in this category, of course. :-) ] Norm
friedman@rd1632.Dayton.NCR.COM (Lee G. Friedman) (03/24/89)
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Date: Mon, 13 Mar 89 14:10 PST
From: Erik <JOHANSSON@icdc.llnl.gov>
Subject: Occam User Group #10 Conference, April 3-5, 1989
To: transputer@tcgould.tn.cornell.edu
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To: Transputer Mailing List, transputer@tcgould.tn.cornell.edu
Fm: Andy Bakkers, OUG-10 Conference chairman
Subj: Program for the OUG-10 meeting
---------------------------------------------------------------------------
Applying Transputer Based Parallel Machines -1-
OUG-10 Conference April 3-5, 1989, Enschede, Netherlands
PROGRAM
Time Monday
9:00 Opening session
9:30 Experiments in Algorithmic Parallelism.
Peter C. Capon, University of Manchester, UK.
10:00 PDS: Program Development System for Transputer Based Machines.
J.Eudes,F.Menneteau,L.Mugwaneza,T.Muntean. University of Grenoble, Fr
10:30 Coffee break
11:00 Design, Abstract Data Types and occam.
Jon M. Kerridge and Sue Wright, The University Sheffield, UK.
11:30 Configuration Tools for a Transputer Workstation.
Peter Croll and Gordon Manson, The University of Sheffield, UK.
12:00 Highly Transparent Monitoring of Parallel Systems using Logical Clocks
Wentong Cai and Stephen Turner, University of Exeter, UK.
12:30 Lunch
14:00 A Transputer based visual system.
A.A.J. Langenkamp and P.M.Elgershuizen, W. Huiskamp, P.L.J. van
Lieshout, TNO Physics and Electronics Laboratory The Hague, NL.
14:30 Visualisation of 3D empirical data: The VOXEL processor.
Wim Huiskamp and Paul Elgershuizen, Ad Langenkamp,Peter van Lieshout.
TNO Physics and Electronics Laboratory, The Hague, NL.
15:00 Marvin - Multiprocessor Architecture for Vision.
Chris Brown and Michael Rygol, Sheffield University, UK.
15:30 Tea break
16:00 Memory Managers for Transputer Networks.
J.C. Admiraal and N. Carmichael,KSEPL Shell Research, Rijswijk,NL
16:30 PARX : A Parallel Operating System for Transputer Based Machines.
J.Briat, M.Favre, D.Fort, N.Gonzalez-Valenzuele, Y.Languw,
T.Muntean, Ph.Waille, University of Grenoble, F.
17:00 Commercials
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Time Tuesday
9:00 A communication Processor on the transputer.
Herman Roebbers, Marnix Vlot, Philips Research Lab, Eindhoven, NL.
9:30 Issues Raised while Implementing a Layered Protocol
using Occam and the Transputer.
Roger M.A. Peel, University of Surrey, UK.
10:00 An Occam-2 Implementation of Higher-Level Network Protocols: A Case
Study in Interfacing a Multi-Transputer System to a Local Area Network
Mark Heaps, The University of Kent at Canterbury, UK.
10:30 Coffee break
11:00 Topologies for Large Transputer Networks:
Theoretical Aspects and Experimental Approach.
Francoise Baude, Francoise Carrw, Pascal Clwrw and Guy Vidal-Naquet
CGE Research Center, Marcoussis, F.
11:30 TRANSNET - A Transputer-Based Communicaion Service.
Peter H. Welch, The University of Kent at Canterbury, UK.
12:00 The latest from Inmos by Terry McCloskey and others.
12:30 Lunch
14:00 Use of Occam for the validation of Distributed Discrete event
driven simulation.
A.H. Djahanguir and J.C. Geffroy
Institut National des Sciences Appliquees, Toulouse Cedex, F.
14:30 Discrete Event Simulation Using Occam.
Christopher H. Nevison, Colgate University, Hamilton, New York, USA.
15:00 A structural Dynamics Problem on a network of transputers.
A. Cosnuau, ONERA, DMI-Groupe Calcul Parallele, Chatillon Cedex, F.
15:30 Tea break
16:00 Applicability of a 16-Node Transputer Array Without External Memory.
Patrick Van Renterghem, State University of Ghent, B.
16:30 PIPES: A Transputer-based parallel architecture for
AI real time applications.
Gian Paolo Balboni, CSELT, Torino, Italy
17:00 Commercials
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Time Wednesday
9:00 BIONIVISION A laserscanner with transputers.
G. ter Reehorst and K.C.J. Wijbrans
Bionic a div. of Van Rietschoten & Houwens, Rijswijk ZH, NL.
9:30 A novel architecture for data-aquisition and on-line analysis
in high-energy physiscs experimentation.
J.C. Vermeulen et al, NIKHEF-H, Amsterdam, NL.
10:00 Transputer based database organisation - an example protein database
Implemented using pipeline and hypercube configurations.
K. Stringer and L.C. Waring, The Queen's University of Belfast, N.I.
10:30 Coffee break
11:00 An operational Pattern Recognition System on Transputers.
E. Buitenwerf, L.J.M. Nieuwenhuis,PTT Dr Neher Labs, Leidschendam, NL
11:30 Graceful Termination - Graceful Resetting
Peter H. Welch, The University of Kent at Canterbury, UK.
12:00 Closing session
12:30 Lunch
There are still a few places available for this conference. Please contact
the conference chairman: Andy Bakkers e-mail elbscbks@henut5.bitnet.
Conference proceedings will be published by:
I.O.S.
International Organisations Services BV
Van Diemenstraat 94
1013 CN Amsterdam
The Netherlands
Tel: +31 20 38 21 89
Fax: +31 20 22 60 55
Title:Applying Transputer Based Parallel Machines.
Signed:
Andrew P. Bakkers
Twente University
Enschede
The Netherlands