mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) (03/17/89)
All this talk about integer benchmarks has left me wondering: how important is it to have fast integer processing, as compared to FP? I really have no idea what most people do, but for me, it seems that all of "integer"-type work that I do, something like a Sun-3 is plenty fast (compiling, popping up windows, netnews). It's in my big FP intensive jobs that I wish a computer were 20 times faster than it is. Are there any really big jobs out there that are seriously bounded by integer CPU performance? (Excuse me, but I'm probably very naive) If I want to speed up floating point, how much do I need to speed up the integer unit? If I had to make a choice, I know which I' take, thank you. Matt Kennel mbkennel@phoenix.princeton.edu
tim@crackle.amd.com (Tim Olson) (03/18/89)
In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: | Are there any really big jobs out there that are seriously bounded | by integer CPU performance? (Excuse me, but I'm probably very naive) Oh, yes. Our machines here are loaded with simulations to do. We could always use more integer performance. -- Tim Olson Advanced Micro Devices (tim@amd.com)
blarson@skat.usc.edu (Bob Larson) (03/18/89)
In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: >All this talk about integer benchmarks has left me wondering: > >how important is it to have fast integer processing, as compared >to FP? Like everthing else in benchmarks, "it depends". For what I do, I'd be willing to trade a few orders of magnatude of floating point performance for a few extra percent of integer performance. I can't even remember how to declare a floating point variable in the language I use the most at work. Actually, floating point performance is pretty important on the systems I use, since it is used to simulate 48 bit integer arithmatic.... (We don't have the source to that stuff, so I can't compare speed with recoding it to do 32 bits at a time.) >If I want to speed up floating point, how much do I need to speed >up the integer unit? Again, it depends... -- Bob Larson Arpa: Blarson@Ecla.Usc.Edu blarson@skat.usc.edu Uucp: {sdcrdcf,cit-vax}!oberon!skat!blarson Prime mailing list: info-prime-request%ais1@ecla.usc.edu oberon!ais1!info-prime-request
mbutts@mntgfx.mentor.com (Mike Butts) (03/19/89)
From article <7137@phoenix.Princeton.EDU>, by mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel): > Are there any really big jobs out there that are seriously bounded > by integer CPU performance? (Excuse me, but I'm probably very naive) One major 'black hole' for integer performance is logic and fault simulation. A modern event-driven logic simulator, which models the operation of a digital logic system with great detail (0/1/unknown, various drive strengths, gate delays which depend on logic value, spike detection, etc., etc., not to mention behavioral models, switch-level models, etc.), is a large, very irregular program with no floating point at all. Lots of data-dependent branches and pointer chasing. Since a modern chip can have over 100K gates, and hundreds of bytes per gate is required to store the data, tens, even hundreds of megabytes of physical memory is required, so things must be packed into irregular data structures. So far, full-functionality logic simulation has proven resistant to vectorization or any other kind of high-level parallelization. Since the topology of a logic network is very irregular, we don't get to take advantage of the beautiful regularities and predictabilities available in scientific computing. Hardware implementations of the algorithm have helped sometimes, but they are notoriously inflexible and restricted to a subset of the problems. Parallel simulation is a subject of research, but with no major commercial impact yet. Logic simulation is required for modern VLSI development, to have any chance at all of working silicon in the first few tries. Since it takes hours to simulate milliseconds on any computer in existence, we'll take all the integer performance we can get, thank you. Fault simulation, used for developing test sequences to run on chips as they are fabricated, is worse still. It's a challenging problem. Give us 100 MIPS and we'll be happy for awhile, then beg for 1000. -- Mike Butts, Research Engineer KC7IT 503-626-1302 Mentor Graphics Corp., 8500 SW Creekside Place, Beaverton OR 97005 ...!{sequent,tessi,apollo}!mntgfx!mbutts OR mbutts@pdx.MENTOR.COM These are my opinions, & not necessarily those of Mentor Graphics.
seibel@cgl.ucsf.edu (George Seibel) (03/19/89)
In article <24888@amdcad.AMD.COM> tim@amd.com (Tim Olson) writes: |In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: || Are there any really big jobs out there that are seriously bounded || by integer CPU performance? (Excuse me, but I'm probably very naive) | |Oh, yes. Our machines here are loaded with simulations to do. We could |always use more integer performance. What kinds of simulations are these? I don't doubt that they exist, I've just never seen one and am genuinely curious. Would there be any commercial interest in a really fast integer box that had only fair floating pt performance? George Seibel, UCSF seibel@cgl.ucsf.edu
brooks@vette.llnl.gov (Eugene Brooks) (03/20/89)
In article <11458@cgl.ucsf.EDU> seibel@cgl.ucsf.edu (George Seibel) writes: >|| Are there any really big jobs out there that are seriously bounded >|| by integer CPU performance? (Excuse me, but I'm probably very naive) >| >|Oh, yes. Our machines here are loaded with simulations to do. We could >|always use more integer performance. > >What kinds of simulations are these? I don't doubt that they exist, >I've just never seen one and am genuinely curious. Would there be any >commercial interest in a really fast integer box that had only fair >floating pt performance? Any computer architecture simulations are bound by integer performance. There are quite a few companies which simulate their architectures before they build them to evaluate the impact of instruction set and timing changes. We simulated a full shared memory multiprocessor which used packet switched networks for the shared memory system, doing algorithm/architecture studies, and kept a Cray class processor busy for the better part of a year before the workload ramped down. For these programs software emulation of floating point would have been sufficient. Of course the computer was used for other things which required balanced floating point performance as well... brooks@maddog.llnl.gov, brooks@maddog.uucp, .../uunet!maddog.llnl.gov!brooks
tim@crackle.amd.com (Tim Olson) (03/20/89)
In article <11458@cgl.ucsf.EDU> seibel@cgl.ucsf.edu (George Seibel) writes: | In article <24888@amdcad.AMD.COM> tim@amd.com (Tim Olson) writes: | |In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: | || Are there any really big jobs out there that are seriously bounded | || by integer CPU performance? (Excuse me, but I'm probably very naive) | | | |Oh, yes. Our machines here are loaded with simulations to do. We could | |always use more integer performance. | | What kinds of simulations are these? I don't doubt that they exist, | I've just never seen one and am genuinely curious. Would there be any | commercial interest in a really fast integer box that had only fair | floating pt performance? To design our next-generation processors, we need to examine a number of architectural tradeoffs and see how they affect overall performance. To do this, we use an Architectural Simulator (simulates the processor at the register-transfer level), make the appropriate changes to it, and run a suite of benchmarks. The simulator is heavily instrumented to collect a wide range of statistics, and runs about 1600 simulated cycles per second on a Sun 4/110. The only floating-point in the simulator is calculating and printing some of the statistics at the end of the simulation -- everything else is purely integer. -- Tim Olson Advanced Micro Devices (tim@amd.com)
bcase@cup.portal.com (Brian bcase Case) (03/20/89)
>What kinds of simulations are these? Instruction set simulators. >Would there be any commercial interest in a really fast integer box >that had only fair floating pt performance? I don't want this to sound sarcastic, but I think they're called Personal Computers. And sometimes the floating-point perfomance bairly qualifies as fair! Let me cast my vote for the screamin'est integer box possible (I put in my two cents with the architecture of the 29000).
bs@linus.UUCP (Robert D. Silverman) (03/20/89)
In article <24888@amdcad.AMD.COM> tim@amd.com (Tim Olson) writes: :In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: :| Are there any really big jobs out there that are seriously bounded :| by integer CPU performance? (Excuse me, but I'm probably very naive) : :Oh, yes. Our machines here are loaded with simulations to do. We could :always use more integer performance. : Oh yes, indeed. I do a lot of computational number theory, including factoring large integers, primality proofs on 1000 digit numbers, multi-precision polynomial arithmetic over finite fields, etc., etc. I'd like to see large word and register sizes. i.e. hardware support for 128 bit integer multiplies and divides, etc. Bob Silverman
henry@utzoo.uucp (Henry Spencer) (03/21/89)
In article <11458@cgl.ucsf.EDU> seibel@cgl.ucsf.edu (George Seibel) writes: >... Would there be any >commercial interest in a really fast integer box that had only fair >floating pt performance? Probably. That's what the Sun 3 mostly was, a few years ago, and it does seem to have attracted some commercial interest... :-) -- Welcome to Mars! Your | Henry Spencer at U of Toronto Zoology passport and visa, comrade? | uunet!attcan!utzoo!henry henry@zoo.toronto.edu
rober@bert.WEITEK.COM (Don Rober) (03/21/89)
In article <7137@phoenix.Princeton.EDU> mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel) writes: > >Are there any really big jobs out there that are seriously bounded >by integer CPU performance? (Excuse me, but I'm probably very naive) > 1. Gate-level simulators 2. Architectural simulators 3. Highly optimizing compilers 4. PostScript (trademark Adobe Systems) -- ---------------------------------------------------------------------------- Don Rober UUCP: {pyramid}!weitek!rober Weitek Corporation 1060 East Arques Sunnyvale, CA 94086
gillies@p.cs.uiuc.edu (03/21/89)
Optimization in VLSI CAD is also a black-hole for integer CPU cycles.
The problem of translating a logic design into a chip is so
complicated that it has been broken into 6 steps, most/all of which
are NP-Hard. Some of the algorithms that can really eat your lunch
are:
1. PLA/Logic minimization (exact solution of NP-Hard problems)
2. Simulated Annealing / Neural Net optimization of the floorplan
design, layout, and (global/channel) routing. Or other types of
iterative branch & bound algorithms for solving these problems
optimally or even sub-optimally.
In other words, just about everything having to do with silicon
compiler "optimal chip generation" is expensive.keith@mips.COM (Keith Garrett) (03/28/89)
In article <1989Mar18.170407.243@mntgfx.mentor.com> mbutts@mntgfx.mentor.com (Mike Butts) writes: ^^^^^^ >From article <7137@phoenix.Princeton.EDU>, by mbkennel@phoenix.Princeton.EDU (Matthew B. Kennel): >> Are there any really big jobs out there that are seriously bounded >> by integer CPU performance? (Excuse me, but I'm probably very naive) > [discussion of simulation deleted] > >It's a challenging problem. Give us 100 MIPS and we'll be happy for awhile, then beg for 1000. if we give it to you will you bother to port your software?? 8-) -- Keith Garrett "This is *MY* opinion, OBVIOUSLY" UUCP: keith@mips.com or {ames,decwrl,prls}!mips!keith USPS: Mips Computer Systems,930 Arques Ave,Sunnyvale,Ca. 94086