mdeale@algol.acs.calpoly.edu (04/05/89)
Hello, many of you may have already seen this. What follows is a quote from Aviation Week (AvLeak), 3/6/89 issue. Disclaimer: I have no affiliation with them, my purpose in posting this is to inform only. DARPA research efforts: "... * A miniature supercomputer capable of operating at a speed of 1 billion operations/sec. and occupying a volume of only 10 cu. in., is projected to be demonstrated in 1990." p.27 [other projects mentioned] Anyone have more info and/or comments? Myron // mdeale@cosmos.ACS.CalPoly.EDU // "... but cleanliness is next to RISCyness." ++ bcase
jesup@cbmvax.UUCP (Randell Jesup) (04/05/89)
In article <9951@polyslo.CalPoly.EDU> mdeale@algol.acs.calpoly.edu () writes: > >Hello, > many of you may have already seen this. What follows is a quote from >Aviation Week (AvLeak), 3/6/89 issue. Disclaimer: I have no affiliation >with them, my purpose in posting this is to inform only. > > DARPA research efforts: "... * A miniature supercomputer capable of >operating at a speed of 1 billion operations/sec. and occupying a volume >of only 10 cu. in., is projected to be demonstrated in 1990." p.27 >[other projects mentioned] Well, the government put out an RFP (?) for a gigaflop (note flops, not ops) design back in '87. Could well be a variant on one of the responses to that request for proposals (though the size allowed was more than 10 cubic inches, more like 100 or 1000.) A practical design, well, that's another story. I'll believe such a machine when I see it (and we may). -- Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup
BruceH@cup.portal.com (Bruce Robert Henderson) (04/06/89)
Actually, such a device would be possible using Josephson [SP?] gates {a superconducting
gate, I remenber a rather large article in Scientific American many years ago....}rsb@bashful.ACA.MCC.COM (Richard S. Brice) (04/07/89)
In a recent flyer advertising (using exerpts) a publication called "Advanced Military Computing", a darpa director named Raymond Colladay is quoted as claiming that DARPA plans to have a billion operation per second supercomputer packaged in 10 cubic inches by next year. I don't have access to "Advanced Military Computing" so I can't say whether a longer article appeared there.
shore@mtxinu.COM (Melinda Shore) (04/07/89)
In article <149@bashful.ACA.MCC.COM> rsb@bashful.ACA.MCC.COM (Richard S. Brice) writes: |In a recent flyer advertising (using exerpts) a publication called |"Advanced Military Computing", a darpa director named Raymond Colladay is |quoted as claiming that DARPA plans to have a billion operation per second |supercomputer packaged in 10 cubic inches by next year. But it's going to weigh 7 tons. -- Melinda Shore shore@mtxinu.com Mt Xinu ..!uunet!mtxinu.com!shore
shs@uts.amdahl.com (Steve Schoettler) (04/08/89)
In article <813@mtxinu.UUCP> shore@mtxinu.COM writes: >In article <149@bashful.ACA.MCC.COM> rsb@bashful.ACA.MCC.COM (Richard S. Brice) writes: >|In a recent flyer advertising (using exerpts) a publication called >|"Advanced Military Computing", a darpa director named Raymond Colladay is >|quoted as claiming that DARPA plans to have a billion operation per second >|supercomputer packaged in 10 cubic inches by next year. > >But it's going to weigh 7 tons. Must be hardware compression! :-) >-- >Melinda Shore shore@mtxinu.com >Mt Xinu ..!uunet!mtxinu.com!shore -- Steve Schoettler shs@uts.amdahl.com {sun,decwrl,pyramid,ames,uunet}!amdahl!shs Amdahl Corp., M/S 213, 1250 E. Arques Ave, Sunnyvale, CA 94088
les@uokmax.UUCP (The Doctor) (04/09/89)
This 10in cube is not all that unfeasible. In the December '88 issue of Electronics magazine there is an article on a speech Seymour Cray gave about the Cray-3 due out last quarter this year. It clearly states that "The Cray-3 will pack all the circuitry for a full-blown 16-processor machine with 4 gigabytes of main memory into less than a cubic foot of space." It also goes on to state that it will be capable of "16 billion floating-point operations/s". Yes, that is floating point ops not ops. It goes into more detail about it, but the main issue is they are using GaAs chips which are very miniaturized. -- ------------------------------------------------------------ |J Les Perkins ---> les@uokmax | ...!sun!texsun!uokmax!les | |University of Oklahoma |---------------------------|__________ |Engineering Computer Network | Opinions contained herein are bogus.|
mjt@super.ORG (Michael J. Tighe) (04/09/89)
In article <2866@uokmax.UUCP> les@uokmax.UUCP (The Doctor) writes: > <quote from 12/88 Electronics magazine> >"The Cray-3 will pack all the circuitry for a full-blown 16-processor machine >with 4 gigabytes of main memory into less than a cubic foot of space." This is misleading. Although the actual CPU & memory modules may take up less than a cubic foot of space, they also need power supplies and a cooling system (immersion). The actual system is much larger. Based on the pictures of the prototype Cray-3 that I saw (Supercomputing 88), the dimensions of the Cray-3 appear to be are around 2.5 feet in diameter (octagonal shape) and 3 feet high (more or less). This is a lot more than a cubic foot. -- ------------- Michael Tighe internet: mjt@super.org uunet: ...!uunet!super!mjt
rodman@mfci.UUCP (Paul Rodman) (04/10/89)
In article <2866@uokmax.UUCP> les@uokmax.UUCP (The Doctor) writes: > <Stuff about Cray 3> This 10in cube.......... Was the DARPA spec for a 10in cube or 10 cubic inches? :-):-):-) >detail about it, but the main issue is they are using GaAs chips which are >very miniaturized. Nope. The Gas chips are pretty tame, size-wise. Its the packaging method that connects things in the 3rd dimension with 12,000 hair-thin wires from board to board that boggles the mind. To save on the 3rd dimension they also have to grind down the *thickness* of the die as they come from Gigabit, else a basic cpu would be 2 inches think, not 1 inch. Gag! what does that do to the net yield? Bye, Paul K. Rodman rodman@Multiflow.com
keith@mips.COM (Keith Garrett) (04/13/89)
In article <761@m3.mfci.UUCP> rodman@mfci.UUCP (Paul Rodman) writes: <Stuff about Cray 3 and GaAs> >To save on the 3rd dimension they also have to grind down the *thickness* >of the die as they come from Gigabit, else a basic cpu would be 2 inches >think, not 1 inch. Gag! what does that do to the net yield? semiconductor manufacturers have been grinding the backs of of wafers for years. most (probably all) IC's you can buy today lost material off their backsides right before being placed in packages. the process is simple and shouldn't add defects to the active region (there is some evidence that back grinding traps defects away from the active region, improving yield) -- Keith Garrett "This is *MY* opinion, OBVIOUSLY" UUCP: keith@mips.com or {ames,decwrl,prls}!mips!keith USPS: Mips Computer Systems,930 Arques Ave,Sunnyvale,Ca. 94086
gillies@p.cs.uiuc.edu (04/13/89)
What happened to the STAR WARS GaAs microprocessor project? Wasn't CDC/TI fabbing 150-200 MOPs RISC chips in 1987 or 1988? Of course, these were research chips, not production version. What has happened since then?
jesup@cbmvax.UUCP (Randell Jesup) (04/21/89)
In article <14903@gryphon.COM> scarter@gryphon.COM (Scott Carter) writes: >The DARPA GaAs microprocessor project is ongoing; both CDC/TI and >McDonnell Douglas have contracts. Both have fabricated and run the >microprocessor core chips (though at rather less than 150 MOPS so far - >actual speeds are not publishable to my knowledge). The GE rpm-40 was done, and works (this is the CMOS side of the same program, 40Mhz). Did something like 40Mhz in (very carefully done) wirewrap at optimum temp and voltage. Might get more (50?) in a real board (I left before silicon was available, so this is all second-hand). I believe Sperry got their chip working also (I saw an early 10Mhz version). The GaAs people have their hands full with limited gates (REAL limited compared to CMOS), clock skew, etc, etc. Clock skew at 100Mhz+ is REAL nasty. -- Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup