[comp.arch] WISC "impossibility"

rodman@mfci.UUCP (Paul Rodman) (05/06/89)

In article <27034@ism780c.isc.com> marv@ism780.UUCP (Marvin Rubenstein) writes:
>In article <10544@cit-vax.Caltech.Edu> yair@tybalt.caltech.edu.UUCP (Yair Zadik) writes:
>>A couple of years ago there was an article in Byte about a proposed design
>>which they called WISC for Writeable Instruction Set Computer.  The idea
>
>Yes, it is a bad idea.  In the mid 60's I was at Standard Computer (no longer
>in existance) and I actually built such a machine.  It was called the
>
>In practice we found that it was impossible to make the thing work because
>any modification to the control store could effect th 'basic' instruction
>behavior.  As an example, one of the problems we found was that when running
>the 'FORTRAN' instructions, double precision floating divide produced the
>wrong answer if the instruction was executed at the same time as a tape unit
>was reading a file mark.  I decided that there was no way to support a
>machine like that in the field, so the experment was terminated.
>

So you had a bad design....why does that make it a bad idea? I personally 
think that a VLIW with  Henry's "interpreter" posting idea does the job quite nicely,
however idea isn't "impossible".

I sounds to me like you just had a poorly thought out design. I see no reason
for building a machine that gets floating point errors when encountering a
file mark (?!??)...that is just plain *broken* design.

>   Marv Rubinstein


    Paul K. Rodman 
    rodman@mfci.uucp
    __... ...__    _.. .   _._ ._ .____ __.. ._
    

raymond@ptolemy.arc.nasa.gov (Eric A. Raymond) (05/06/89)

>A couple of years ago there was an article in Byte about a proposed design
>which they called WISC for Writeable Instruction Set Computer.  The idea

Am I missing something?  Wouldn't a machine with loadable microcode
satisfy this?  Hasn't that been done for years (and was was the floppy
disk was designed to store)?  Even LISPM's have it.

Did the original poster mean that a program could change the ucode?
This is a little more complicated ....

-- 
Eric A. Raymond  (raymond@ptolemy.arc.nasa.gov)
G7 C7 G7 G#7 G7 G+13 C7 GM7 Am7 Bm7 Bd7 Am7 C7 Do13 G7 C7 G7 D+13: Elmore James

nather@ut-emx.UUCP (Ed Nather) (05/06/89)

In article <1140@ptolemy.arc.nasa.gov>, raymond@ptolemy.arc.nasa.gov (Eric A. Raymond) writes:
> >A couple of years ago there was an article in Byte about a proposed design
> >which they called WISC for Writeable Instruction Set Computer.  The idea
> 
> Am I missing something?  Wouldn't a machine with loadable microcode
> satisfy this?  Hasn't that been done for years (and was was the floppy
> disk was designed to store)?  Even LISPM's have it.
> 
> Did the original poster mean that a program could change the ucode?
> This is a little more complicated ....
> 

The first "WISC" machine I know of was designed about 1959.  It used
non-destructive magnetic cores to hold vertical microcode, which could,
in fact, be changed by an operating "program" that was in execution.
The idea was to be able to emulate different computers at the machine
instruction level, and be able to use an instruction set tailored for
writing compilers to write them in, and a different instruction set to
execute the generated code.  All the machine "instructions" were just
microcode subroutines.  The machine  (the PB440 by Packard Bell Computer)
never made it to market, but a prototype worked as advertised.



-- 
Ed Nather
Astronomy Dept, U of Texas @ Austin

pcg@aber-cs.UUCP (Piercarlo Grandi) (05/07/89)

In article <1140@ptolemy.arc.nasa.gov> raymond@ptolemy.arc.nasa.gov.UUCP (Eric A. Raymond) writes:
    >A couple of years ago there was an article in Byte about a proposed design
    >which they called WISC for Writeable Instruction Set Computer.  The idea
    
    Am I missing something?  Wouldn't a machine with loadable microcode
    satisfy this?  Hasn't that been done for years (and was was the floppy
    disk was designed to store)?  Even LISPM's have it.

Uh. You are right. It is time to mention the Burroughs B1700/B1800, about
which the late Organick wrote a very interesting book. It had as many
microcodes/instruction sets as needed. The B1800 could even page it. Code
density was impressive, and so was speed, considering the technology. It
had also some funny details (bit addressing!).

In a sense the ultimate CISC. It does support the RISC's advocates
contention that a (single) CISC machine special instructions are not
general enough, so why bother.

I agree, by the way, with Spencer's earlier remark about RISC+fast quick
bytecode interpreter == WISC. In particular, look at the TRANSPUTER:
its has 2k fast on chip RAM. What for? :->

As to me, my favourite machine architecture (the ultimate RISC?) would be a
Burroughs zero address mainframe (8 bit instructions, no registers) but with
four stacks (to avoid multiplexing a single stack top, and giving an effect
similar to multiple scratch register optimization in more conventional
architectures). The small size of instructions would eliminate I guess the
major problem of RISC as it is now (and that makes WISC attractive), code
density.
-- 
Piercarlo "Peter" Grandi           | ARPA: pcg%cs.aber.ac.uk@nsfnet-relay.ac.uk
Dept of CS, UCW Aberystwyth        | UUCP: ...!mcvax!ukc!aber-cs!pcg
Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk

artm@phred.UUCP (Curmudgeon) (05/14/89)

In article <12831@ut-emx.UUCP> nather@ut-emx.UUCP (Ed Nather) writes:
>
>The first "WISC" machine I know of was designed about 1959.  It used
>........
>microcode subroutines.  The machine  (the PB440 by Packard Bell Computer)
>never made it to market, but a prototype worked as advertised.

In a pig's eye it didn't.  Two of these beasts crunched numbers for the
Dept. of Physiology and Biophysics at the University of Washington for
years.  At one time some folks there were ruminating on the idea of
designing a micro based on the PB440 architecture.  Of course this was
in an environment where everybody was still running labs with PDP8's.

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                                            Physio-Control
                                      ...uw-beaver!pilchuck!seahcx!phred!artm
                                          (or something like that)
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