mark@mips.COM (Mark G. Johnson) (05/18/89)
"It's not nearly as much fun building a supercomputer as it is
simply inventing one" --- N. Lincoln
Often one hears people grumble that semiconductor companies don't offer
the "right" chips. Amazingly, these folks know exactly what the world
desperately needs (or will need, or should need) and the semiconductor
companies are just too dumb to realize it.
It's easy to predict what will *really* motivate a semiconductor
company: giant Purchase Orders. If IBM wanted 100,000 pieces per week
of 8Kx37 dual-port EEPROM (with +6.7 and -1.42 volt supplies), the chip
houses would trample one another in a mad frenzy to get the business.
For better or for worse, a semiconductor company would much rather have
a big purchase order than a (possibly) Good Idea. Abundant numbers of
self-appointed gurus will gladly predict "what the world needs", but
chip houses prefer to know "what HP and DEC and Apple will buy a lot
of, right away".
They'd much rather listen to the Big Company Purchasing Agent than
the pontificating idea-man who claims to know what the future demand
might be. At least the purchasing agent can deliver, WITH CERTAINTY,
a large market.
Therefore, the surest way to get a new chip design-idea into production
is to convince a high-volume purchaser (like DEC or HP or Compaq) to
demand it from the chip makers. This strokes the semiconductor companies
exactly the right way: a practically guaranteed large market. Other
approaches, such as having a suitably-credentialed expert gravely
pontificate on what the world really needs, will be far less successful.
However, semiconductor companies will occasionally be daring and try
something new & different. And, for the most part, they've gotten a
bloody nose for their troubles.
Four or five years ago the rage was "intelligent memories". It was
obvious to many sages that plain old read/write memories weren't
the path to the future, so "logic-in-memory" was needed. Several
start-up companies were founded to exploit this trend. Today, after
the passage of time, what survived? FIFOs and Dual-port RAMs,
and that's all. (I would claim that the dualport market is tiny,
extremely tiny). And the startups? They failed, mostly; or else
they shifted gears and now make plain vanilla read/write RAMs.
Next came cache-Tag RAMs. Boy howdy, aren't these what the world
needs. Go have a look at a Sun workstation, or an Apollo, or an HP,
or DEC, or MIPS, or Intergraph, or Data General, or an IBM. Do the
same for IBM-PC's & clones, Apples, and Amigas. The absence of
cache-Tag RAMs is staggering. What an enormous number of system
designs and designers that omitted the "right" part.
AMD, to their credit, has bravely introduced a Content Addressible
Memory. System designers have been clamoring for CAMs for a very
long time; now we'll see whether or not CAMs will find a niche
in real (not paper) system designs. I certainly hope AMD is wildly
successful with this part; it'd encourage further innovation.
Today one hears that "what we need" is mega-bandwidth main memories
and/or interconnects. "It's time" the main memories did more
than they do now. Lots of people agree, I'm sure. The trick is,
to get Unisys and Compaq and HP to agree, and to have _them_ demand
it from TI and Hitachi and Performance Semi and Oki and Micron and
Toshiba and Philips and Motorola and ...
--
-- Mark Johnson
MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
...!decwrl!mips!mark (408) 991-0208slackey@bbn.com (Stan Lackey) (05/18/89)
In article <19913@obiwan.mips.COM> mark@mips.COM (Mark G. Johnson) writes: > "It's not nearly as much fun building a supercomputer as it is > simply inventing one" --- N. Lincoln >[semiconductor manufacturers would] much rather listen to the >Big Company Purchasing Agent than >the pontificating idea-man who claims to know what the future demand >might be. At least the purchasing agent can deliver, WITH CERTAINTY, >a large market. I was at DEC long enough to know the other side of this issue as well. They tend to be VERY conservative about bringing new components and technologies in-house. Much of this is due to a history of being burned; designing it in, then having the manufacturer bag out. These cases are what tends to be remembered, not the supplier uneventfully delivering on time. In terms of what makes it into the urban legend notebook, anyway. In other words, don't plan on going to a larger company to decide on innovative new products. In fact, they tend to push too hard even when considering new technologies. In doing gate array designs, for example, there is a chance, however small, that a chip can't be laid out and still meet the performance predicted by the design manual. When I was there anyway, they demanded that manufacturers prove that they can guarantee that that wouldn't happen, with sizeable punitive measures if it did. I didn't blame them when they walked away from the business. At Alliant, we had a much more liberal attitude. In fact, that's why I think a lot of startups start up; the large companies being slow to adapt new stuff creates a real niche for risk-takers using the hot chips. Some fail because their hot chips don't show up. >However, semiconductor companies will occasionally be daring and try >something new & different. And, for the most part, they've gotten a >bloody nose for their troubles. > >Four or five years ago the rage was "intelligent memories". It was... > >Next came cache-Tag RAMs. Boy howdy, aren't these what the world >needed... Unfortunately, the cache-tag guys screwed up. They insisted on using technology n-1. You could always make a faster cache using vanilla technology n RAMs. Really, if you're going to make asic memories work, you have to use the hottest process. Or have a very substantial "value added" in some other dimension. Warning: Anecdote following. "Type 'n' now" I remember trying to convince reps from semi houses that they should make an edge-triggered SRAM; they could do away with the address-line-change detector circuits, and have a dandy edge to start the timing chain, and we would have a faster RAM with a built-in address register. The response? "Shut up, you're a system designer. You don't know anything about RAM's." We even could never convince them that you don't need a cycle time equal to access time! -Stan