roelof@idca.tds.PHILIPS.nl (R. Vuurboom) (06/29/89)
In article <112807@sun.Eng.Sun.COM> khb@sun.UUCP (Keith Bierman - SPD Languages Marketing -- MTS) writes: >At yesterday's IEEE HOT CHIPS conference, we were treated to three >papers about dedicated SPARC FPU's in addition to the papers focused >on FPU's BIT is already sampling ECL SPARC chips. So the FPU >TMS390C602, LSI 64814 to name just 3). > >PRIMSA delievered a system level paper about their 250 MIPS (native, >say 100vaxmips) 100Mflop SPARC machine. Anybody care to tell us poor folks who couldn't attend more about the pearls and gems of wisdom that were delivered at the conference? -- Roelof Vuurboom SSP/V3 Philips TDS Apeldoorn, The Netherlands +31 55 432226 domain: roelof@idca.tds.philips.nl uucp: ...!mcvax!philapd!roelof
khb%chiba@Sun.COM (Keith Bierman - SPD Languages Marketing -- MTS) (06/30/89)
In article <142@ssp1.idca.tds.philips.nl> roelof@idca.tds.PHILIPS.nl (R. Vuurboom) writes: > > >Anybody care to tell us poor folks who couldn't attend more about >the pearls and gems of wisdom that were delivered at the conference? Well, perhaps the general chair (Robert Steward, 1658 Belvioir Drive, Los Altos, CA 94022) can provide you with a means to order paper copies. I am working from the schedule. I am not xrefing the papers themselves. Sorry if I miss anyone. Here was the scheulde, with a few comments: 1) New RISC CPU's Cypress SPARC program overview (chips shipping, and coming) BIT's ECL SPARC (shipping samples) PRISMA's 4nsec SPARC There was (believe it or not) an attempt made to get non-SPARC stuff. But since Sun doesn't control the chip foundries efforts, they can talk about ongoing projects irrespective of what it does to workstation sales .... 2) RISC CPU updates Fujitsu SPARC chip set update (stuff) LSI MCT SPARC chip (new nifty MMU) 88K family update (now shipping in quantity) MIPS(co) architecture (no news) Clipper update (no news, just claim lots of units shipped) 3) Kahan on Floating Point issues. As always, a fount of wisdom. This time he focused on how he helped screw up the 8087 register stack. Of course, the 8087 is a great ieee chip .. it just was meant to be better. 4) New Processor Architectures Intel i860 (shipping) 5) FPU's ABACUS 3170/71 SPARC FPU (70 shipping, in SS-1; 71 soon) TI SPARC FPU (single chip; really rad divide and sqrt algorithms) LSI SPARC (improving all around, caught the TI trick too late?) MIPS 3010 (shipping in quantity) 6) New CISC 68040 (if you liked the 030 ...) i486 (if you liked the 386) now include FPU on board. NexGen (really,really fast 386 multichip solution ... not fully silicon yet) 7) Embedded CPUs i960 (nicer than 860 ?, different at least) MS32Gx32 (shipping in quantity) AMD29000 (shipping) 8) Graphics coprocessors TI TMS34020 and ..82 (graphics + FP) Sun GX processor (huge ASIC state machine; great performer) 9) Compiler panel discussion Tom Pennello, Steve Jonson, Steve Glanville, Michael Tiemann Nothing new was revealed; old wounds reopened. Keith H. Bierman |*My thoughts are my own. Only my work belongs to Sun* It's Not My Fault | Marketing Technical Specialist ! kbierman@sun.com I Voted for Bill & | Languages and Performance Tools. Opus (* strange as it may seem, I do more engineering now *)
roelof@idca.tds.PHILIPS.nl (R. Vuurboom) (06/30/89)
In article <113277@sun.Eng.Sun.COM> khb@sun.UUCP (Keith Bierman - SPD Languages Marketing -- MTS) writes: >In article <142@ssp1.idca.tds.philips.nl> roelof@idca.tds.PHILIPS.nl (R. Vuurboom) writes: >> >> >>Anybody care to tell us poor folks who couldn't attend more about >>the pearls and gems of wisdom that were delivered at the conference? > >Well, perhaps the general chair (Robert Steward, 1658 Belvioir Drive, >Los Altos, CA 94022) can provide you with a means to order paper copies. > [Follows lots of goodies] Thanks. He (or the committee) doesn't happen to have electronic mail addresses by any chance? > > i486 (if you liked the 386) now include FPU on board. > NexGen (really,really fast 386 multichip solution ... not > fully silicon yet) > Somebody asked a while back if the 68040 would kill the E2000 (a high performance 680x0 cpu) I said I didn't think so and gave some arguments. Anyway that means I get to ask this question: Will the i486 kill the NexGen? And these: Whats the estimated performance differential between the two? When is it planned to be not only fully silicon but fully tested? -- Roelof Vuurboom SSP/V3 Philips TDS Apeldoorn, The Netherlands +31 55 432226 domain: roelof@idca.tds.philips.nl uucp: ...!mcvax!philapd!roelof
marc@oahu.cs.ucla.edu (Marc Tremblay) (06/30/89)
>> NexGen (really,really fast 386 multichip solution ... not >> fully silicon yet) >> >Will the i486 kill the NexGen? > >And these: > >Whats the estimated performance differential between the two? David Stiles, who gave an excellent presentation, estimated the performance of the NexGen chip set to be almost twice as fast as the 486. If I remember correctly he had an extra slide showing that: NexGen = 1.9 X i486 There are lots of nice features in their architecture, such as out-of-order completion, virtual register assignment, write reservation tables, etc. All those features are implemented using about 2.2 million transistors spreaded on 8 chips. One of the busses runs at 66 MHz making the synchronization between the chips quite tricky (they use phase-locked-loop). The chip set represents a lot of hard work and several good ideas but I wonder if they had anticipated that the i486 would be as fast as it turned out to be. Marc Tremblay marc@CS.UCLA.EDU
khb%chiba@Sun.COM (chiba) (07/01/89)
In article <145@ssp1.idca.tds.philips.nl> roelof@idca.tds.PHILIPS.nl (R. Vuurboom) writes: > >Thanks. He (or the committee) doesn't happen to have electronic mail addresses >by any chance? As chair, he seemed the best choice. If anyone from the committee wants to stand up and be counted ... He chose not to publish a email address. > >Will the i486 kill the NexGen? > >And these: > >Whats the estimated performance differential between the two? >When is it planned to be not only fully silicon but fully tested? The NexGen folks admitted they don't have first silicon done yet. I would be loathe to predict how it all turns out. It should be noted that they plan to sell systems, not chips. Keith H. Bierman |*My thoughts are my own. Only my work belongs to Sun* It's Not My Fault | Marketing Technical Specialist ! kbierman@sun.com I Voted for Bill & | Languages and Performance Tools. Opus (* strange as it may seem, I do more engineering now *)