ttwang@polyslo.CalPoly.EDU (Thomas Wang) (07/08/89)
In this month's Communiction of ACM there is an interesting paper on Micro-pipelines and transitional logic. I found its ideas to be revolutional. This is a VLSI design philosophy that eliminates the need for clocks. All components are self synchronized, making modular replacement and improvement possible. A silicon compiler for Micro-pipeline machines should be easier, since the interactions between components all follow a standard protocol. -Thomas Wang (Mak-Kuro Kurosuke, come on out! If you don't come out, we'll pull your eyeballs out! - as heard in Tonari No Totoro ) ttwang@polyslo.calpoly.edu