[comp.arch] Code scheduling

rajeevc@mipos2.intel.com (rajeev chandrasekhar) (07/24/89)

i was wondering if anybody had any numbers to show performance improvements
after code reordering .... i want to get a feel for what impact scheduling
has on overhaul performance for "CISC" and "RISC" processors....

thanks.
rajeev

<disclaimer: i speak simply for myself..>

Rajeev Chandrasekhar
Intel Corp            >> theres someone in my head, and its not me << 
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Santa Clara, CA 95051  {hplabs,oliveb}!intelca!mipos2!rajeevc