[comp.arch] SPARC Implementations

mslater@cup.portal.com (Michael Z Slater) (06/19/89)

>Can someone explain the basic differences between the Cypress and Fujitsu
>SPARC implementations?  Are they binary code compatible?

They are binary compatible, although the Cypress chip has a couple of
instructions that the Fujitsu does not.

There are two Fujitsu chips: the original gate array, now called the
S-16, which runs at 16 MHz, and a standard-cell reimplementation, called
the S-20 and S-25, at 20 and 25 MHz.  The Cypress chip is a full-custom
design, and runs at up to 33 MHz.  All three designs have different
pinouts.  The Cypress design has a different hardware structure for the
coprocessor interface.

All of these designs are pretty primitive -- No on-chip floating-point,
MMU, or cache control.  Things will get more interesting in the next
generation.

Michael Slater, Microprocessor Report   mslater@cup.portal.com

aglew@mcdurb.Urbana.Gould.COM (06/25/89)

>>Can someone explain the basic differences between the Cypress and Fujitsu
>>SPARC implementations?  Are they binary code compatible?
>
>They are binary compatible, although the Cypress chip has a couple of
>instructions that the Fujitsu does not.

Terminology check - what does this mean?

Possibilities:

(1) the Cypress chip and the Fujitsu chip share all user mode instructions,
    but there are a few priviliged instructions that differ.

(2) the Cypress chip implements in hardware several instructions that are in
    the SPARC architecture definition, that the Fujitsu chip traps for, and
    for which a conforming implementation is required to provide emulation
    code.

(3) the extra instructions are accessible from user mode and not emulated,
    but are flagged "don't use these instructions if you want to be portable
    to other SPARCs". (I would sure hope that there's a compiler switch in this
    case).

ingoldsb@ctycal.COM (Terry Ingoldsby) (07/22/89)

Can someone explain the basic differences between the Cypress and Fujitsu
SPARC implementations?  Are they binary code compatible?

If this is a question that has been discussed 10**10 times before, then
just send me email.  Thanks in advance.
-- 
  Terry Ingoldsby                       ctycal!ingoldsb@calgary.UUCP
  Land Information Systems                           or
  The City of Calgary         ...{alberta,ubc-cs,utai}!calgary!ctycal!ingoldsb

khb@chiba.Sun.COM (chiba) (07/23/89)

In article <351@ctycal.UUCP> ingoldsb@ctycal.COM (Terry Ingoldsby) writes:
>Can someone explain the basic differences between the Cypress and Fujitsu
>SPARC implementations?  Are they binary code compatible?
>

From an application programmers point of view all existings (and all
proposed) SPRC's are the same. Binary compatibility exists (try your
sun4 code on a solb... :>) 4/2xx application code works fine on SS-1
and SS 330. There are one or two places where the OS may have to care
(page size on the SS-1 is smaller, for example).

Electrically the chips are different. The current Cypress set is
faster than the current Fujitsu set.

I am sure someone from Cypress (or their ROSS subdivision) will rise
up to tell us all about the neat electrical stuff ... :>

Keith H. Bierman      |*My thoughts are my own. Only my work belongs to Sun*
It's Not My Fault     |	Marketing Technical Specialist    ! kbierman@sun.com
I Voted for Bill &    |   Languages and Performance Tools. 
Opus  (* strange as it may seem, I do more engineering now     *)

mo@prisma (08/03/89)

Are they binary compatible:

Yes, all SPARC machines are binary compatible at the user program level.
OS code can tell the difference that some machines have different
MMUs or different floating point units (number of functional units,
for example, may effect fault recovery).

All user programs should run identically.

	-Mike