acockcroft@pitstop.West.Sun.COM (Adrian Cockcroft) (08/08/89)
In article <2272@cbnewsc.ATT.COM>, gregg@cbnewsc.ATT.COM (gregg.g.wonderly) writes: > BLWP is effectively a free context switch. The 9900 has only three The 9900 looks good until you count how many cycles these "free" instructions take. Having to go to external memory several times in most instructions cripples performance. The 9995 was a 9900 with a few hundred bytes of on-chip RAM which went much better. > hardware registers. The status register, the PC, and the workspace > pointer, which is the address of the registers in memory. When you > > Given a larger address space than just 64K and a MMP, this architecture could > provide some unique opportunities for code size reduction. Also, in C, > passing the address of a register variable would have meaning. > > -- Its called a Transputer! A 4Gb address space, 4Kb of on-chip RAM to put your register workspaces in and a very compact no-addressing-modes instruction set. A mostly RISC instruction set (no microcode for simple operations) with hardware and microcode support for a lightweight process kernel. Some people complain about the software support for the Transputer but its much better than the 9900 had. I programmed in 9900 assembler and TI concurrent pascal a few years ago and it was a real nightmare. > ----- > gregg.g.wonderly@att.com (AT&T bell laboratories) -- Adrian Cockcroft Sun Cambridge UK TSE sun!sunuk!acockcroft Disclaimer: These are my own opinions