ingoldsb@ctycal.COM (Terry Ingoldsby) (07/20/89)
I tried posting this before, but I don't think it got out. My
apologies if you see it twice.
Does anyone know which of the CISC microprocessors are microcoded
and which are hardwired? I would expect the older (simpler) units
to be hardware implementations whereas the newer (fancier?) chips
would use microcode. Do the vendors ever sell the same chip with
different microcode? I have no practical reason to know this, I'm
just curious.
--
Terry Ingoldsby ctycal!ingoldsb@calgary.UUCP
Land Information Systems or
The City of Calgary ...{alberta,ubc-cs,utai}!calgary!ctycal!ingoldsbseanf@sco.COM (Sean Fagan) (07/27/89)
In article <405@ctycal.UUCP> ingoldsb@ctycal.COM (Terry Ingoldsby) writes: >Does anyone know which of the CISC microprocessors are microcoded >and which are hardwired? I would expect the older (simpler) units >to be hardware implementations whereas the newer (fancier?) chips >would use microcode. Do the vendors ever sell the same chip with >different microcode? I have no practical reason to know this, I'm >just curious. Well, it depends on what you want to call a CISC microprocessor. The 680x0, 80x86, NS32xxx, WE32x00, NEC V series, and Transputers are all microcoded. The newer versions of the chips, in the cases of the 680[34]0, 80486, and 32532, are still microcoded, but some of the instructions only use the ucode to decode, and then call very specialized units (e.g., push and pop on a '486 have hardware units on-chip that do the work, but they only get activated after the microcode decodes the instruction). Chips such as the SPARC, 88000, ARM, MIPS series, and the 6502 do not have microcode; they are hardwired. This really has nothing to do with how new the chips are. As to selling different versions of chips with different microcode: yes, it is done. To cite two examples, the 32000 from NS was notorious for having bugs in the chip; I think some (maybe most) were microcode bugs. Also, the 80386 went through several revisions where there might have been slight changes to the microcode (it looked that way). -- Sean Eric Fagan | "Uhm, excuse me..." seanf@sco.UUCP | -- James T. Kirk (William Shatner), ST V: TFF (408) 458-1422 | Any opinions expressed are my own, not my employers'.
rk@lexicon.com (Bob Kukura) (07/28/89)
In article <3098@scolex.sco.COM> seanf@sco.COM (Sean Fagan) writes: > In article <405@ctycal.UUCP> ingoldsb@ctycal.COM (Terry Ingoldsby) writes: > >Does anyone know which of the CISC microprocessors are microcoded > >and which are hardwired? I would expect the older (simpler) units [...] > Chips such as the SPARC, 88000, ARM, MIPS series, and the 6502 do not have > microcode; they are hardwired. This really has nothing to do with how new Are you sure the 6502 isn't microcoded? I built a ttl 6502 (6507 actually) emulator as a digital design lab project in college, and it had to execute each instruction in the same number of cycles as the real thing in order to be able to plug into an Atari 2600 video game as the demo. Our implementation decoded the instruction into two parts. One controlled the datapaths and the other selected one of a couple of dozen microprograms. The number of steps needed for each microprogram exactly matched the cycle count of the real chip. Our design was based on analyzing the instruction set, not on any internal design documentation. I've since been interested in knowing if this is how the real chip is implemented. -- -Bob Kukura smart: rk@lexicon.com dumb: {husc6,linus,harvard,bbn}!spdcc!lexicon!rk phone: (617) 891-6790
mslater@cup.portal.com (Michael Z Slater) (07/28/89)
>Well, it depends on what you want to call a CISC microprocessor. The 680x0, >80x86, NS32xxx, WE32x00, NEC V series, and Transputers are all microcoded. Not quite. The V33 is a non-microcoded implementation, to provide additional performance and (perhaps) to avoid the microcode copyright issues. Michael Slater, Microprocessor Report mslater@cup.portal.com 415/494-2677
pec@necntc.nec.com (Paul Cohen) (07/28/89)
Newsgroups: comp.arch seanf@sco.COM (Sean Fagan) states > Well, it depends on what you want to call a CISC microprocessor. The 680x0, > 80x86, NS32xxx, WE32x00, NEC V series, and Transputers are all microcoded. Just a minor correction: NEC's V33 and V53 processors are hardwired, not microcoded. The other V-series parts are microcoded, the subject of a long legal battle with Intel that was recently settled in NEC's favor.
dks%decay@Sun.COM (dk smith... in full-dispersion mode) (07/29/89)
In article <486@lexicon.com> rk@lexicon.com (Bob Kukura) writes: >Are you sure the 6502 isn't microcoded? I built a ttl 6502 (6507 >actually) emulator as a digital design lab project in college, and it [....] > I've since been interested in knowing if this is how >the real chip is implemented. >-- >-Bob Kukura smart: rk@lexicon.com > dumb: {husc6,linus,harvard,bbn}!spdcc!lexicon!rk > phone: (617) 891-6790 Check out a book by the author whose last name is Anceau. The author's first name and title of the book escape me now. The book discusses different implementations of the 6502 (which were actually fabricated) in an attempt to determine the tradeoffs between performance and die size for fully hardwired designs to fully micocoded designs (and everything in between!). I think you'll find this interesting, Bob. dk ------------------------------------------------------------
dks%decay@Sun.COM (dk smith... in full-dispersion mode) (07/29/89)
In a recent posting I referred to a book by Anceau that discussed different implementations of the 6502. Well, low and behold, I wuz wrong! Two seconds after my post I realized the study was on the 6800. Guess I was too eagar to help... I'll think first next time :-) Anyway, this mistake does not take anything away from Anceau's book. It will be interesting to some... dk ---------------------------------------------------------
hascall@atanasoff.cs.iastate.edu (John Hascall) (07/29/89)
In article <118523@sun.Eng.Sun.COM> dks@sun.UUCP (dk smith... in full-dispersion mode) writes: > >In a recent posting I referred to a book by Anceau that >discussed different implementations of the 6502. >Two seconds after my post I realized the study was >on the 6800. Is this it? (aren't online card catalogs great!) Your search: FIND AUTHOR ANCEAU Items found: 3 at ALL IOWA STATE LIBRARIES AUTHOR Anceau, F. TITLE The architecture of microprocessors / Francois Anceau and the IMAG Computer Architecture Group ; translated by Manissa J. Dobree Wilson and Derek Milligan. PUBLICATION Wokingham, England ; Reading, Mass. : Addison-Wesley, c1986. CALL NUMBER QA76.9.A73 A52 1986
dks%decay@Sun.COM (dk smith... in full-dispersion mode) (08/01/89)
In article <1269@atanasoff.cs.iastate.edu> hascall@atanasoff.cs.iastate.edu.UUCP (John Hascall) writes: >In article <118523@sun.Eng.Sun.COM> dks@sun.UUCP (dk smith... in full-dispersion mode) writes: >> >>In a recent posting I referred to a book by Anceau that >>discussed different implementations of the 6502. > >>Two seconds after my post I realized the study was >>on the 6800. > > Is this it? (aren't online card catalogs great!) > > >Your search: FIND AUTHOR ANCEAU >Items found: 3 at ALL IOWA STATE LIBRARIES > >AUTHOR Anceau, F. >TITLE The architecture of microprocessors / Francois Anceau and the > IMAG Computer Architecture Group ; translated by Manissa J. > Dobree Wilson and Derek Milligan. >PUBLICATION Wokingham, England ; Reading, Mass. : Addison-Wesley, c1986. >CALL NUMBER QA76.9.A73 A52 1986 Ya, Mon! dat iz de book... Thanks for pulling me out of that one, John! dk ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ingoldsb@ctycal.COM (Terry Ingoldsby) (08/02/89)
Thanks for all the info about the many different microprocessors.
I had suspected that the 32000 was microcoded (elegant but slow)
and the 6502 was hardwired (primitive but fast). What about the
6809? It seems to have been a very nice chip (for an 8 bit) but
never went very fast. Is this a good indication it was microcoded?
Also, what about the early Intel stuff, say 8080, and 8085. I'm
interested about early designs too.
--
Terry Ingoldsby ctycal!ingoldsb@calgary.UUCP
Land Information Systems or
The City of Calgary ...{alberta,ubc-cs,utai}!calgary!ctycal!ingoldsbfriedl@vsi.COM (Stephen J. Friedl) (08/10/89)
In article <427@ctycal.UUCP>, ingoldsb@ctycal.COM (Terry Ingoldsby) writes: > Thanks for all the info about the many different microprocessors. > I had suspected that the 32000 was microcoded (elegant but slow) > and the 6502 was hardwired (primitive but fast). What about the > 6809? It seems to have been a very nice chip (for an 8 bit) but > never went very fast. Is this a good indication it was microcoded? _Byte_ magazine ran a three-part article on the design of the 6809, and they say that it used random logic. Written by Terry Ritter and Joel Boney of Moto, it appeared in Jan/Feb/Mar 1979, and it is very good reading. Steve -- Stephen J. Friedl / V-Systems, Inc. / Santa Ana, CA / +1 714 545 6442 3B2-kind-of-guy / {attmail uunet}!vsi!{bang!}friedl / friedl@vsi.com "My new bestseller, _Teach_Yourself_to_Read_, is now available everywhere" -me
rrt@halley.UUCP (Robert Teisberg) (08/12/89)
In article <1163@vsi.COM> friedl@vsi.COM (Stephen J. Friedl) writes: >_Byte_ magazine ran a three-part article on the design of the 6809, >and they say that it used random logic. Written by Terry Ritter and >Joel Boney of Moto, it appeared in Jan/Feb/Mar 1979, and it is very >good reading. Authoritative, too, since Terry Ritter and Joel Boney were both members of the original 6809 team. >Stephen J. Friedl / V-Systems, Inc. / Santa Ana, CA / +1 714 545 6442 >3B2-kind-of-guy / {attmail uunet}!vsi!{bang!}friedl / friedl@vsi.com > >"My new bestseller, _Teach_Yourself_to_Read_, is now available everywhere" -me -- Bob Teisberg @ Tandem Computers, Inc. | ...!rutgers!cs.utexas.edu!halley!rrt 14231 Tandem Blvd. | soon to be rrt@mpd.tandem.com Austin, Texas 78728 | (512) 244-8119 Any resemblance to the opinions of a real person or corporation is concidental.
henry@utzoo.uucp (Henry Spencer) (08/13/89)
In article <560@halley.UUCP> rrt@halley.UUCP (Robert Teisberg) writes: >>_Byte_ magazine ran a three-part article on the design of the 6809, >>and they say that it used random logic. Written by Terry Ritter and >>Joel Boney of Moto, it appeared in Jan/Feb/Mar 1979, and it is very >>good reading. The only thing I specifically remember from those articles was their comment about clock speed: [roughly] "We thought about putting a few divider stages on the clock input so we could claim victory in the clock-speed race, but we decided that the users wouldn't appreciate having to include a tuned cavity as part of the clock oscillator..." -- V7 /bin/mail source: 554 lines.| Henry Spencer at U of Toronto Zoology 1989 X.400 specs: 2200+ pages. | uunet!attcan!utzoo!henry henry@zoo.toronto.edu