mcg@mipon2.intel.com (Steven McGeady) (09/16/89)
If you don't think a press release is appropriate for this group, stop reading now. I will be posting more technical information soon. Also, you can come hear about the i960CA at Microprocessor Forum (9/21-22) or Embedded Systems Conference (9/27-29). ------------------------------------------------------------------------------ Press Release ------------------------------------------------------------------------------ Chandler, AZ, September 12, 1989 -- Intel Corp. today introduced the world's first superscalar microprocessor, the 32-bit i960 CA processor, developed for embedded systems applications. Delivering multiple instructions per clock cycle for sustainable throughput of 66 native MIPS, the i960CA doubles the performance goal of RISC techniques. Ken Fine, general manager of Intel's Chandler Microcomputer/ASIC Division, said, "We knew when we defined the 80960 architecture that simply increasing clock speeds to execute serial events faster would translate into cost-prohibitive memories and peripheral components. What we've done instead is to use superscalar parallel processing technology to simultaneously execute as many as three instructions per clock cycle. This level of parallel execution, coupled with on-chip coprocessing elements, such as the four-channel, high-speed direct-memory access (DMA) unit, results in an embedded processor of unmatched performance." The i960 CA is also the most highly integrated 32-bit embedded processor yet developed. In addition to its superscalar architecture, the device contains both code and register file caches, fast data RAM, an efficient and flexible bus interface, a high-speed channel processor (with four DMA channels), and a low-latency interrupt control unit. Containing almost 600,000 transistors and using Intel's one-micron CHMOS*-IV fabrication technology, the i960 CA is the industry's highest performance embedded processor. First True Superscalar Microprocessor ------------------------------------- Superscalar execution techniques bring the performance advantages of supercomputer-style processing techniques to the i960CA's embedded system applications. The superscalar processor looks several instructions ahead in the software instruction stream and selects groups of instructions that can safely begin executing at the same time. The i960CA processor can decode four and execute three separate instructions in a single clock cycle. Within embedded program loops, the highly parallel device can typically sustain an execution rate of two instructions per clock cycle, essentially doubling the performance goal of RISC techniques. The 33-MHz version of the processor can thus deliver performance levels up to 66 MIPS or 30 VAX* MIPS. This performance makes the device the fastest processor yet developed for embedded system processing and control applications, ranging from factory and office automation to high-speed communications. Multiple Parallel Execution Units --------------------------------- In addition to the superscalar core, the i960CA contains several functional units that decrease system complexity and cost, and further boost performance. Each of the i960CA's parallel processing execution units operate independently of one another and can operate on one or more instructions simultaneously. The functional units include 1) an integer unit for math and logical operations; 2) a multiply/divide unit; 3) an address generation unit for performing address calculations; 4) a bus interface unit for handling off-chip memory and I/O devices; 5) a parallel instruction scheduler with 6) a data RAM. Very Large-scale Integration ---------------------------- A 1-Kbyte insrtuction cache on the i960CA processor facilitates accelerated execution of standard instructions and time-critical interrupt routines. A 1.5Kb, 128-bit wide on-chip data RAM contains program variables and a configurable register-file cache, which decreases the processor's reliance on costly high-speed external memory subsystems. A high-speed channel processor incorporates four DMA channels and operates in parallel with the main CPU to off-load a variety of block data transfers and asynchronous device service operations. The CPU and DMA share access to the external memory systems and I/O devices through an efficient and highly- integrated system bus interface controller. The bus controller is software-configurable to compensate for external memory subsystems that contain a combination of bus widths (8-, 16-, or 32-bit), access times, burst-mode capabilities and data-ordering conventions. This feature enables customers to configure lower-cost memory subsystems than ordinarily required for 32-bit performance levels. Finally, a low-latency, propgrammable, on-chip interrupt control unit supports the demands of real-time, preemptive multitasking control applications and coordinates prioritized requests from up to 248 on-chip and off-chip sources. The processor can save its entire previous execution state and begin servicing a high-priority request entirely on-chip, thereby reducing reliance on bus bandwidth required to go to off-chip memories. Second-Generation 80960 Microprocessor -------------------------------------- The i960CA represents the second generation of 80960 micrprocessors designed specifically for embedded applications. From concept forward, the 80960 architecture was designed to be implementation-independent. The i960CA is Intel's fourth 80960 processor, joining the 80960KA, 80960KB, and 80960MC implementations. The architecture will yield a broad range of processor implementations throughout the next decade. Intel's 80960 processor architecture plans include cost-reduced versions, such as a 16-bit external bus product, higher performance versions and application-specific proliferations, all of which will maintain object-code compatibility geared to preserving the software investments made by 80960 customers. Superscalar i960CA Availability ------------------------------- The i960CA processor has been in customer beta test sites since June, with volume production scheduled to begin in the fourth quarter, 1989. The processor, packaged in a 168-pin ceramic pin-grid array, is available in three speed versions: 16 MHz, 25 MHz and 33 MHz. U.S. pricing for the device is $219 each in 1000 piece quantities for the 16 MHz version, $297 each in similar quantities for the 25 MHz version, and $325 each for the 33 MHz version. The i960CA will be available in lower cost plastic quad flat pack packaging in the second quarter of 1990. For additional information about the i960CA, contact your local Intel sales office, distributor, or call 1-800-548-4725; or write to Intel Corp, Dept. LG-42, 3065 Bowers Ave., Santa Clara, CA 95051. * CHMOS-IV is a patented process of Intel Corp. * VAX is a registered trademark of Digital Equipment Corp. ------------------------------------------------------------------------------ End of Press Release ------------------------------------------------------------------------------ Selection of other Press Release made in conjunction with i960 CA launch Avtron Manufacturing announces 80960CA-based drive system controller - [ Drive systems control the speed of large-horsepower motors ] Data Switch to Integrate New Intel Processor in Future Host Networking Systems - [ i960CA in host networking systems ... enable communications among up to 32 IBM mainframes ... ] Destiny Technology Supports 80960 RISC Processor - [ ... have designed a turnkey page printer controller ... ] Fluke Introduces High-Performance RISC Logic Analysis System - [ ... logic analyzer support and chip debug ... for i960CA ... ] Ford Aerospace - DIAGS II Digital Imagery and Graphics Station - [ ... Embedded processor using 80960 ... image processing, compression, real-time voice encoding ... ] GVC Corp. Selects Intel i960 CA for High-Speed Laser-Printer Add-In Card - [ ... the i960CA increased the speed by as much as 6 times over competing alternatives ... ] Heurikon Corp Announces First VMEbus CPU board based on i960CA - [ single-quantity price $3995, quan 100 $2795, includes ethernet, SCSI, serial, more ... ] Hughes Integrated Processor Using Intel 80960 Chip To Be Delivered in 1990 - [ ... "brassboard" for Common Integrated Processor (CIP) for Advanced Tactical Fighter (ATF) Program ... ] Labtam Systems Pty (Australia) Announces 80960-based X Window System Display Controller - [ .. 8 bits per pixel 1024x800 resolution ... ] Mentor Graphics Develops Simulation Model of Intel's 80960CA Processor Micro Indusrties Introduces RISC Development Board based on i960CA - [ Multibus-II board ... ] Microtec Research and Intel Announce Partnership to Produce Software Tools for 80960 Newgen Systems Corp Announces 80960-based Laser Printer Nucleus International Announces Vector Processing Card using 80960 - [ Nucleus SQL Database engine offloads host ... ] Phoenix Technologies Unveils "Stampeded" Printer Controllers Based on 80960 CPU - [ Laser-printer controllers ] PLX Technology Bus Interface Chips Connect 80960 to VMEbus, VSB, MB-II, NuBus, and MicroChannel Quantitative Technology Corp Announces i960CA Instruction Rescheduling Optimizer Ready Systems Supports i960 Processor with VRTX32 Real-time OS Sky Computers Announces Commitment to i960 Platform - [ New Product Will be First to Integrate i960 and i860 on one board ] Tadpole Technology Supports i960CA with High-Speed VME Single-Board Hardware Tartan Labs Validates Ada Sun 80960 Compiler Wind River Systems Demonstrates VxWorks Running on Intel 80960 Processors ------------------------------------------------------------------------------ That's All Folks ------------------------------------------------------------------------------ S. McGeady Intel Corp