[comp.arch] pipelining

lsheldon@cup.portal.com (Laurence Larry Sheldon) (07/14/89)

New to the net, etc, etc, so I may be asking an un-necessary question--

Whatzit mean--"pipeline"?  There seemed to be an assertion that it was
invented with the RISC notion.

The UNIVAC/Sperry/Unisys 1100's have had instruction stacks(4 or 8--maybe
16 deep) for a long time--that is 4 or more instructions in some state
of decomposition and execution on every cycle.

Izzat the same thing?

Larry

if there was an opinion there--its mine, or I stole it somewhere.

cassel@sce.carleton.ca (Ron Casselman) (09/19/89)

I am a graduate student taking a course in computer architecture. A
requirement of the course is to write a term paper on a subject in
computer architecture. I would appreciate any references to papers on
instruction pipelining, particularly those discussing and comparing
different implementations.

Please respond via mail. I will post the references if there is
sufficient interest.

Thanks in advance.

------------------------------------------------------------------
Ron Casselman	domain style	cassel@sce.carleton.ca
		uucp		...!{uunet!mitel,watmath}!sce!cassel