hhd0@GTE.COM (Horace Dediu) (10/11/89)
I seek references and insight into techniques used in minimizing microcode width and length. If enough responses arrive, I will post a summary. The problem is one of optimization and I'm looking for efficient algorithms. Any literature references welcome. Source code would be ideal. This is for a Master's thesis (not my own). I read comp.arch regularly, but e-mail is great too. Try hhd0@gte.com or hazzam@jade.cc.tufts.edu. Adv(thanks)ance. -- Horace Dediu \"That's the nature of research--you don't know |GTE Laboratories (617) 466-4111\ what in hell you're doing." `Doc' Edgerton |40 Sylvan Road UUCP: ...!harvard!bunny!hhd0................................|Waltham, MA 02254 Internet: hhd0@gte.com or hhd0%gte.com@relay.cs.net..........|U. S. A.
segall@caip.rutgers.edu (Ed Segall) (10/13/89)
> I seek references and insight into techniques used in minimizing microcode width and > length. If enough responses arrive, I will post a summary. The problem is one of > optimization and I'm looking for efficient algorithms. Any literature references > welcome. Source code would be ideal. This is for a Master's thesis (not my own). > I read comp.arch regularly, but e-mail is great too. Try hhd0@gte.com or > hazzam@jade.cc.tufts.edu. The original motivation for the Trace Scheduling compiler work at Yale, which led to the Multiflow computer architecture, was optimization of microcode. See the recent discussion in this newsgroup about FPS v. Multiflow, et al. for some of the issues. See the Bulldog thesis (Yale) for a comprehensive treatment. It was also published by MIT Press, I believe. --Ed -- uucp: {...}!rutgers!caip.rutgers.edu!segall arpa: segall@caip.rutgers.edu