tak@eecg.toronto.edu (Mike Takefman) (10/17/89)
(Note this has also been posted to comp.dsp) Here at UofT we have a small group beginning to explore the area of DSP microprocessor architectures with a vision to improving compiler technology, and processor/system architecture to increase system performance. Shortly, I will be finishing a fully metered 56000 simulator thru which we wish to run meaningful/realistic benchmarks and real application code. We are interested in all types of applications, and have a great interest in applications that do not completely fit into the on-board memory, especially those written in C, i.e. large systems where the majority of code is written in C with hand written code for the really critical sections. We would appreciate hearing from anyone that could provide code for analysis. Thanks. Michael Takefman: Email tak@eecg.toronto.edu Phone (416) 978-8935 Paul Chow: Email pc@eecg.toronto.edu Phone (416) 978-2402