storkel@limpet.shell.com (S. Storkel) (11/15/89)
Help! I need some info on memory management units and caches used in conjunction with Sun's SPARC microprocessor for a class I'm taking. All of the information I have been able to find about the SPARC architecture says that MMU and cache design is left up to the implementor. I've seen remarks mentioning a "reference" MMU spec that is being written by Sun. Does this document exist? If so, what is the name and how can I get a copy? Has anyone written papers describing cache implementations that can be used with SPARC? I recall seeing something about the SCRAM cache used in the Sun 4-110 in Sun Technology magazine, but I was hoping for something a little more substantial. I need this information farily quickly, so any help you could give me would be greatly appreciated. If possible, reply to the address below NOT the one that appears in the header of this posing. Thanks for the help. Scott Storkel storkel@rice.edu BLUware, Shell Development Company, Bellaire Research Center P.O. Box 481, room 2202, Houston, Texas 77001 (713-663-2993)