[comp.arch] Cyrix -- avoiding the I/O bottleneck

chasm@attctc.Dallas.TX.US (Charles Marslett) (12/14/89)

In article <1904@crdos1.crd.ge.COM>, davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) writes:
 > In article <112400012@uxa.cso.uiuc.edu> afgg6490@uxa.cso.uiuc.edu writes:
 > | 
 > | comp.arch might be interested in a few details about the
 > | Cyrix math chip.  This is a 387 / Weitek compatible chip,
 > | boasting significant speedups.  (Biggest speedup, of course,
 > | is avoiding the coprocessor interface).
 > 
 >   Two questions: (1) since this is a plug-in replacement for the 80387,
 > how does it avoid the coprocessor interface, and (2) in what way is it
 > Weitek compatible? I haven't heard that it will run Weitek code, is this
 > a typo or underpublicized feature?

A future version of the Cyrix chip can use the Weitek interface (that is, the
memory mapped addresses the Weitek occupies) -- but it will not be Weitek
code compatible.  So you could get comparable speed to a Weitek chip, but only
if the code were recompiled for the Cyrix logical interface.

 > bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
 > "The world is filled with fools. They blindly follow their so-called
 > 'reason' in the face of the church and common sense. Any fool can see
 > that the world is flat!" - anon


Charles Marslett
chasm@attctc.dallas.tx.us