roy@ics.uci.edu (John M.A. Roy) (12/11/89)
After about 4 years in the software game I'm getting back to the hardware realm. So bear with me if this is an old question or if this is the wrong group (please tell me the correct ones). I heard about pseudo-static RAM from a Hitachi Engineer the other day. We need are currently using 32KB static RAMs and are looking to go to 128KB static RAMs. It would certainly be cheaper if we could use these pseduo-static devices. We need low power (LP) but not a lot of speed (120ns) and would like to make as few hardware mods as possible, of course :-). Has anybody had any luck with theses? John M.A. Roy (714) 856-5039 ICS Dept., Univ. Calif., Irvine CA 92717 Internet: roy@ics.uci.edu
nelson@m.cs.uiuc.edu (12/15/89)
I'm familiar with static and dynamic RAM from both a VLSI and actual use level, but I've never heard of "pseudo-static RAM." Does anyone care to explain and describe what it looks like at a transistor level? Danke!
crisp@mips.COM (Richard Crisp) (12/15/89)
Pseudo static RAMs are dynamic RAMs at the transistor level. They auto-refresh and the most tricky part of designing one (besides all the ususal DRAM stuff) is the design of the arbiter that handles simulataneous refresh and access requests. I believe that Toshiba is a big player in the Pseudo-Static market and I understand that they are making good inroads in the slow static market. (you get DRAM density, with the ease of the use of an SRAM). -- Just the facts Ma'am