[comp.arch] IBM 370 Operand Alignment

mash@mips.COM (John Mashey) (02/01/90)

In article <3427@odin.SGI.COM> pkr@maddog.sgi.com (Phil Ronzone) writes:
>In article <3204@aimt.UU.NET> phil@aimt.UU.NET (Phil Gustafson) writes:
>>Dealing with TRANSLATE AND TEST and the even more barouque EDIT AND MARK
>>left me very receptive to the idea of RISC.
>
>Yeah - EDIT AND MARK took almost 14% of the entire microcode memory for
>that one instruction (360/65). And the 360/91, a hardwired non-microcoded
>machine (mostly) didn't support it or any of the other packed decimal
>instructions.

A relevant analysis can be found inGordon Bell & Allen Newell's "Computer
Structures: Readings and Examples", McGraw-Hill, 1971.  In particular,
pages 561-587 look at the S/360 family, and examine tradeoffs and
cost/performance comparisons.  In particular, the hardwired 360/91
had  good cost/performance characteristics, but the best of all was the 
(hardwired) 360/44, which also lacked the variable-length instructions.
ALso, the 360/91 (which had REAL scoreboarding, and was extermely complex,
was shortly withdrawn from the market in favor of the 360/85, which if
not the first, was certainly one of the earliest systems to use
a cache memory.  This is a very useful chapter in many ways, as it also
shows the methods used at the time to scale the same ISA across
technologies.
-- 
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pkr@maddog.sgi.com (Phil Ronzone) (02/03/90)

In article <35321@mips.mips.COM> mash@mips.COM (John Mashey) writes:
>A relevant analysis can be found inGordon Bell & Allen Newell's "Computer
>Structures: Readings and Examples", McGraw-Hill, 1971.  In particular,
>pages 561-587 look at the S/360 family, and examine tradeoffs and
>cost/performance comparisons.  In particular, the hardwired 360/91
>had  good cost/performance characteristics, but the best of all was the 
>(hardwired) 360/44, which also lacked the variable-length instructions.
>ALso, the 360/91 (which had REAL scoreboarding, and was extermely complex,
>was shortly withdrawn from the market in favor of the 360/85, which if
>not the first, was certainly one of the earliest systems to use
>a cache memory.  This is a very useful chapter in many ways, as it also
>shows the methods used at the time to scale the same ISA across
>technologies.


They also really liked the 360/25, which was a double-microcode machine.
It had a "nano-code" engine which drove the microcode which implemented
the 360 instruction set. As I recall, they proposed a 360 family line
of 360/25's (MPs) and 360/44's as the best in terms of P/P.


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Phil Ronzone   Manager Secure UNIX           pkr@sgi.COM   {decwrl,sun}!sgi!pkr
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