[comp.arch] 88K vs. SPARC

jcallen@Encore.COM (Jerry Callen) (02/09/90)

In article <7356@pdn.paradyne.com> alan@oz.paradyne.com (Alan Lovejoy) writes:
>In article <2100@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes:
>>  Having explained why vendors were interested in the 860, and what it
>>offers relative to SPARC, would someone tell me why DG thinks the 88k is
>>better than SPARC? Serious question, what has the 88k got that SPARC
>>doesn't? 
>
> [stuff deleted]
>
>Hardware multiply with a latency of only four cycles, and the ability to
>start a new multiply thru the pipe each clock cycle. 

Grrrrrr..... for the most part, I really like the 88K, but the $#@ MUL
instruction is totally brain-damaged. It's a 32x32 giving 32 multiply,
and it DOESN'T TELL YOU if it overflows! C hackers probably don't care,
but this is useless for languages that DO care about overflow (like Ada).
I was really delighted that Moto put fixed point multiply on the chip until
I discovered this lossage.

And then there is DIV. For some unknown reason, the $#@ chip faults if you
divide two numbers with unlike signs! The 88open folks recognize the absurdity
of this and specify that a BCS compliant OS has to fix this up transparently.

Don't get me wrong; I like the chip. But I'm really annoyed that these little
stupidities snuck in.

-- Jerry Callen
   jcallen@encore.com
   (508) 460-0500