davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) (02/07/90)
I had a chance to try an Aviion before they were marketed, and noted
that there were compiler switches in the C compiler to generate code to
get around the bugs in the 88k. I believe that there were three chip
revs supported.
I *assume* that before the production model shipped there was a clean
version of the 88k, but I have lost my inside connection, due to someone
offering him $20/hr more to consult elsewhere.
What's the scoop on this chip?
--
bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
"Stupidity, like virtue, is its own reward" -megary@dgcad.SV.DG.COM (Gary Bridgewater) (02/08/90)
In article <2091@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes: > I *assume* that before the production model shipped there was a clean >version of the 88k, but I have lost my inside connection, due to someone >offering him $20/hr more to consult elsewhere. > > What's the scoop on this chip? The E2 silicon fixed these problems. DG waited for those before shipping to general customers. Pre-ship systems (for developers) are being (have been) upgraded via board swap to E2 silicon + latest&greatest cache + any other oddities. No -funny switches required anymore. -- Gary Bridgewater, Data General Corporation, Sunnyvale California gary@sv.dg.com or {amdahl,aeras,amdcad}!dgcad!gary The impossible we understand right away - the obvious takes a little longer.
ron@motmpl.UUCP (Ron Widell) (02/10/90)
In article <2091@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes: > [cut to the chase] >get around the bugs in the 88k. I believe that there were three chip > [...] > I *assume* that before the production model shipped there was a clean >version of the 88k, but I have lost my inside connection, due to someone > > What's the scoop on this chip? Unless there have been new bugs reported that I haven't heard about :-(, The C82N mask set for the MC88100 (1.2 micron DLM) has no errata. This set came out of the mask shop about July of '89. The previous mask (4C64D) had two problems (bugs): 1) DIV and DIVU with 0 divisor would not *always* take divide-by-zero exception. 2) Certain bit patterns could cause an aberrant LSB when rounding to single-precision floating point. The MC88200 has been clean since Jan, '89. It is also currently being processed in a 1.2 micron DLM technology. Both devices are scheduled for imminent release in 1.0 micron geometries, so we may soon see 40MHz (Maybe even 50?) devices. -- Ron Widell, Field Applications Eng. |UUCP: {...}mcdchg!motmpl!ron Motorola Semiconductor Products, Inc., |Voice:(612)941-6800 9600 W. 76th St., Suite G | I'm from Silicon Tundra, Eden Prairie, Mn. 55344 -3718 | what could I know?