alan@oz.nm.paradyne.com (Alan Lovejoy) (02/13/90)
In article <3085@rtmvax.UUCP> wbeebe@rtmvax.UUCP (Bill Beebe) writes: >In article <2938@oakhill.UUCP> davet@oakhill.UUCP (David Trissel) writes: >Something else that's interesting. In the February 7th Microprocessor >Report, page 4, under new SPEC numbers, a Moto system with a 33 Mhz 88K came >up with a 17.8 SPECmark. Congratulations. However, the article goes on to >note that the 88K SPECmark was only 1% over the SPARC's 17.6 SPECmark (as >well as the MIPS). I would be most interested to see SPECmarks for the >Heurikon board (or any other system) running the 040 at 25 Mhz or even 33 >Mhz. SPECmark gcc espresso spice doduc nasa7 ll Moto Delta Model 8612 17.8 18.3 23.0 14.8 12.2 17.5 23.9 MIPS M/2000 17.6 19.1 18.3 12.1 17.6 18.4 23.8 Sparcserver 490 17.6 21.4 16.5 16.4 14.0 19.9 19.5 MIPS RC3260 17.3 18.5 18.0 11.9 17.3 18.2 23.3 Solbourne 5/801 16.3 19.5 16.3 14.9 11.6 16.1 18.2 MIPS RC3240 16.0 15.5 17.7 12.1 15.9 18.1 20.4 Moto Delta 8864SP Departmental Comp. 15.2 17.5 19.4 12.5 10.1 15.2 20.7 HP Appollo DN 10010 13.9 12.5 12.9 11.8 23.0 20.4 6.7 DG AV 6200 Server 12.7 13.4 17.1 11.0 9.2 11.9 17.5 Moto Delta 8864SP 12.2 14.0 15.5 10.0 8.1 12.2 16.5 Sparcstation 330 11.8 13.8 11.6 11.4 9.5 14.0 11.2 DECSystem 5400 11.3 10.9 13.4 8.9 9.7 12.6 13.3 DG AV 5010 Server 10.1 10.9 13.3 8.7 7.1 9.5 13.8 DG AV 310 WKS 9.7 9.9 13.1 8.3 6.9 9.3 13.5 DEC VAX 6000 M450 9.2 5.1 6.5 6.2 6.9 29.1 7.2 Sparcstation 1 8.4 10.7 8.9 8.2 5.0 10.2 9.0 DEC VAX 6000 M410 6.8 5.1 6.5 6.2 6.9 8.2 7.2 SPECmark eqntolt matrix300 fpppp tomcatv CPU/MHz Moto Delta Model 8612 17.8 20.7 21.5 15.3 14.9 88000/33MHz MIPS M/2000 17.6 18.3 13.3 20.4 17.7 R3000/25MHz Sparcserver 490 17.6 17.6 22.5 18.8 12.3 SPARC/33MHz MIPS RC3260 17.3 17.9 13.1 20.0 17.3 R3000/25MHz Solbourne 5/801 16.3 17.2 22.6 17.9 11.8 SPARC/33MHz MIPS RC3240 16.0 17.1 13.8 17.8 13.9 R3000/?? Moto Delta 8864SP Departmental Comp. 15.2 16.0 18.4 14.7 11.6 88000/?? HP Appollo DN 10010 13.9 7.8 9.4 31.4 19.9 PRISM/?? DG AV 6200 Server 12.7 13.6 14.1 10.9 11.0 88000/?? Moto Delta 8864SP 12.2 12.8 14.7 11.7 9.3 88000/?? Sparcstation 330 11.8 12.6 14.7 13.1 8.2 SPARC/?? DECSystem 5400 11.3 12.8 10.1 12.5 10.1 R?000/?? DG AV 5010 Server 10.1 10.7 11.1 8.7 8.9 88000/?? DG AV 310 WKS 9.7 10.5 10.9 8.3 8.3 88000/?? DEC VAX 6000 M450 9.2 6.7 13.3 7.5 20.9 VAX/?? Sparcstation 1 8.4 9.7 11.0 7.8 6.0 SPARC/?? DEC VAX 6000 M410 6.8 6.7 6.5 7.5 7.4 VAX/?? Benchmark numbers are relative to VAX 11/780 = 1.0, so higher numbers are better. The programs gcc, espresso, spice, doduc, nasa7, ll, eqntolt, matrix300, fpppp and tomcatv are real programs, not synthetic or toy codes. The SPECmark is the geometric mean of the ten benchmark programs (the Nth root of the product of the membmers of a list with 10 members). An examination of the numbers would lead one to conclude that the benchmarks are heavily affected by the system as a whole, not just the processor. Such things as cache size/speed, memory speed and disk access speed must contribute significantly to the results. Also, the 88k systems typically have 1/4 as much cache as some of the competing Rx000 and SPARC systems (32k versus 128k), even though the 88k is quite capable of supporting 128k of cache. If someone could supply more information about each benchmark, and each system (cache size, CPU clock rate, etc), that might prove enlightening. ____"Congress shall have the power to prohibit speech offensive to Congress"____ Alan Lovejoy; alan@pdn; 813-530-2211; AT&T Paradyne: 8550 Ulmerton, Largo, FL. Disclaimer: I do not speak for AT&T Paradyne. They do not speak for me. Mottos: << Many are cold, but few are frozen. >> << Frigido, ergo sum. >>
khb@chiba.Eng.Sun.COM (Keith Bierman - SPD Advanced Languages) (02/13/90)
In article <7377@pdn.paradyne.com> alan@oz.nm.paradyne.com (Alan Lovejoy) writes: >... nasa7....matrix300... are real programs, not synthetic or toy codes. NASA7 and matrix300 are not completely real codes. NASA7 is the standard NASA/AMES hoop to jump over before you can open your mouth. It contains fully vectorized implementations of the key loops of several popular algorithms: 1) matrix multiply (4 way unrolled for vector computers (sic)) 2) fft (radix 2, 2d) 3) cholesky decomposition 4) vectorized block tridiagonal solver 5) "compute solid related arrays, gauss eliminate the matrix of wall influence coefficients" (sic) (particle simulation) 6) "emit new vortices to satisfy boundary condition..." (sic) 7) invert 3 pentadiagonals simultaneously Each code runs for a reasonable period of time. All are very vectorized, in a fashion which some vectorfolk used to complain about being Cray biased. DH Bailey was the original author. Matrix300 is really a bit of the livermore suite C THIS IS BENCHMARK LBMK14, WHICH PERFORMS C VARIOUS MATRIX MULTIPLICATIONS, INCLUDING TRANSPOSES. Matrix multiply is of sufficient interest to such large groups of people, that having it as part of SPEC is probably a good idea. The implementation is orthodox LINPACK (the library). SPEC is a good thing, but we shouldn't blindly assert that it's all real codes .... it's good stuff ... and that is more than can be said for must of the commonly bandied about benchmarks. -- Keith H. Bierman |*My thoughts are my own. !! kbierman@Eng.Sun.COM It's Not My Fault | MTS --Only my work belongs to Sun* kbierman%eng@sun.com I Voted for Bill & | Advanced Languages/Floating Point Group Opus | "When the going gets Weird .. the Weird turn PRO" "There is NO defense against the attack of the KILLER MICROS!" Eugene Brooks
skeller@xenna.Encore.COM (Shaun Keller) (02/13/90)
In article <7377@pdn.paradyne.com> alan@oz.paradyne.com (Alan Lovejoy) writes: ... > SPECmark eqntolt matrix300 fpppp tomcatv CPU/MHz >Moto Delta Model 8612 17.8 20.7 21.5 15.3 14.9 88000/33MHz >MIPS M/2000 17.6 18.3 13.3 20.4 17.7 R3000/25MHz >Sparcserver 490 17.6 17.6 22.5 18.8 12.3 SPARC/33MHz >MIPS RC3260 17.3 17.9 13.1 20.0 17.3 R3000/25MHz >Solbourne 5/801 16.3 17.2 22.6 17.9 11.8 SPARC/33MHz ... >...Such >things as cache size/speed, memory speed and disk access speed must contribute >significantly to the results. Well, why is comparing a 33 MHz 88k to a 25 MHz R3k a useful comparison? These are RISCs! Clock speeds should be roughly equal since the instructions per clock cycle are about equal. MIPs still looks like a more efficient design. Sure, these are complete (shipping?) system performance numbers, but in comp.arch we should look at basic architectural characteristics that we can isolate and study. :-) -Shaun Keller (skeller@encore.com) "Reductio ad absurdum performed while you wait."