peralta@pinocchio.Encore.COM (Rick Peralta) (02/14/90)
In article <1990Feb12.182411.5982@ico.isc.com> rcd@ico.isc.com (Dick Dunn) writes: >I've changed my mind a few times on this, but I think we're likely to see >64-bit addresses (or, at the least, larger-than-32-bit addresses) a while >before we see 64-bit integers.... Well, what if the RISC people implement some kind register association for basic math instructions? That way the compiler people could do any precision math with quick and simple bits of code. So getting a 32 bit machine to do 64, 128 or even more precision would not be unreasonable. The technique could hang around and work on 16, 32, 64, 128 or whatever bit math systems. Does a half dozen RISC instructions seem like a lot for a 128 bit math operation? So does anyone have an opinion on register groups? Heck, with a little creativity a virtual address space could be allowed to be larger than the size of a pointer (by faulting in the address space). So, the details of the architecture could be moot. - Rick "ok... The virtual address space idea was a bit much..."