tam@vega.uucp (02/27/90)
If you have the information, please help answer the following
questions for ONE or MORE of these commercial multiprocessors
(Sequent Balance, Sequent Symmetry, Encore Multimax, Alliant FX/8):
1. Processor used (name/model) & clock speed of processor (in MHz)
2. Bus cycle time (in MHz).
3. Cache read/write access time (in nano-seconds)
4. Main memory read/write access time (in nano-seconds)
5. Typical cache miss delay (in nano-seconds)
Please indicate if there are multiple answers to each question.
Also, specific references (publications & reports) for these systems
are requested.
Besides getting the exact numbers for each part, the general idea
behind these questions is to understand the relative speeds of
processor, cache, bus, and memory of the shared memory bus-based
multiprocessor systems.
Please send e-mail to tam@vega.berkeley.edu. I will post the collected
reponses. Thanks a mega for your time.
<-- Tam M. Nguyen --> { tam@ernie.Berkeley.EDU | ...!ucbvax!ucbernie!tam }hsv@lanl.gov (Henry S Vaccaro) (02/27/90)
In article <22451@pasteur.Berkeley.EDU>, tam@vega.uucp writes: > If you have the information, please help answer the following > questions for ONE or MORE of these commercial multiprocessors > (Sequent Balance, Sequent Symmetry, Encore Multimax, Alliant FX/8): > > 1. Processor used (name/model) & clock speed of processor (in MHz) > 2. Bus cycle time (in MHz). > 3. Cache read/write access time (in nano-seconds) > 4. Main memory read/write access time (in nano-seconds) > 5. Typical cache miss delay (in nano-seconds) > Being a part of the defense establishment, and naturally suspicious at that (I was born in NJ -- that says it all), I first wondered whether this was some east-block information gathering attempt. (The author's signature makes this seem unlikely, tho.) Then my better side took over. Being naturally curious, I wonder why there is no east block or Chinese participation in this conference. I challenge all of you to foster such participation. If you know somebody appropriate, help them to get access to net news. Surely the chinese computer architecture researchers have some new ideas, or some incisive comments on the designs discussed in this Made In USA (and England) conference? Hank Vaccaro hsv@lanl.gov