[comp.arch] Motorola Delta mips-ratings versus new MPC mips-ratings

mash@mips.COM (John Mashey) (03/16/90)

I noticed in the recent announcements that the 20Mhz MPC-100 is rated at
27 mips, and the 25MHz MPC-200 rated at 33.8 mips.

I thought that the Delta 8864SP (88K with 128K cache @ 20Mhz) was rated
at 17 mips, and the 25Mhz version at 21 mips., and I thought the MPC
systems used the same boards.

1) On the surface, it seems surprising that these machines just jumped
a factor of 1.6X in performance....

2) Could anybody that knows say:
	a) Do the MPC machines have a different memory system than the
	older machines?
	b) Did the compilers get a bunch better?
	c) Or is there some other reason for this that I've missed?
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: 	{ames,decwrl,prls,pyramid}!mips!mash  OR  mash@mips.com
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alan@oz.nm.paradyne.com (Alan Lovejoy) (03/18/90)

In article <37103@mips.mips.COM< mash@mips.COM (John Mashey) writes:
<I noticed in the recent announcements that the 20Mhz MPC-100 is rated at
<27 mips, and the 25MHz MPC-200 rated at 33.8 mips.
<
<I thought that the Delta 8864SP (88K with 128K cache @ 20Mhz) was rated
<at 17 mips, and the 25Mhz version at 21 mips., and I thought the MPC
<systems used the same boards.
<
<1) On the surface, it seems surprising that these machines just jumped
<a factor of 1.6X in performance....
<
<2) Could anybody that knows say:
<	a) Do the MPC machines have a different memory system than the
<	older machines?
<	b) Did the compilers get a bunch better?
<	c) Or is there some other reason for this that I've missed?
<-- 
<-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>

The only thing I've seen on this is a comment by a Moto spokescritter in
EE Times (I believe) to the effect that the MIPS ratings were based on 
Dhrystones relative to the canonical VAX figure of 1757/second.  Since 
27 x 1757 = 35140, which is about what other 20MHz 88k processors do, one 
might be tempted to conclude that the performance increase in this case is 
mostly due to differences in the rules or standards of measurement :-).



____"Congress shall have the power to prohibit speech offensive to Congress"____
Alan Lovejoy; alan@pdn; 813-530-2211; AT&T Paradyne: 8550 Ulmerton, Largo, FL.
Disclaimer: I do not speak for AT&T Paradyne.  They do not speak for me. 
Mottos:  << Many are cold, but few are frozen. >>     << Frigido, ergo sum. >>

john@anderson.uucp (John A. McClenny) (03/21/90)

In article <37103@mips.mips.COM< mash@mips.COM (John Mashey) writes:
<I noticed in the recent announcements that the 20Mhz MPC-100 is rated at
<27 mips, and the 25MHz MPC-200 rated at 33.8 mips.
<I thought that the Delta 8864SP (88K with 128K cache @ 20Mhz) was rated
<at 17 mips, and the 25Mhz version at 21 mips., and I thought the MPC
<systems used the same boards.
<
<1) On the surface, it seems surprising that these machines just jumped
<a factor of 1.6X in performance....
<
<2) Could anybody that knows say:
<	b) Did the compilers get a bunch better?
       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

My Moto sources say that the compilers got much better.  The rumor is
that the compiler group in MPG (MicroProcessor Group) turned their 
C compiler into a real product.  The 68xxx version of their compiler was
substantially 'better' than the commercially available compilers.
This group has some pretty hot compiler jocks.  Moto also is said
to have acquired a hot Fortran compiler.   I guess that the proof in
the above will be if the Specmarks change.




John  McClenny (512/838-4822)
@cs.utexas.edu:ibmchs!auschs!anderson.austin.ibm.com!john
VNET: sc13329@ausvm6 (T/L 678-4822)

Disclaimer : All opinions are my own and do not necessarily reflect the
	opinions of IBM.

heiby@mcdchg.chg.mcd.mot.com (Ron Heiby) (03/23/90)

My understanding is that the jump in MIPS is due to two factors.  One is
that a "better" (at least faster) compiler was used on the latest measurement.
The other is that the formula used to compute MIPS for the latest figures
is the same as the formula used by IBM in their recent announcements.
-- 
Ron Heiby, heiby@chg.mcd.mot.com	Moderator: comp.newprod
"She fell there."  "A victim of Newton's Law, eh?"