dolf@idca.tds.PHILIPS.nl (Dolf Grunbauer) (03/26/90)
The MC68040 has four independent transparent translation registers. Two for data, two for instructions. Reading the User's Manual I get confused about this `independent' as it states in paragraph 6.3 (page 6-12): Also, since the instruction memory unit is used only for instruction prefetches, different instruction and data TT registers can cause PC relative operand fetches to be translated differently from instruction prefetches. (so PC relative addressing uses the data TT's, not the instruction TT's). What I get from this is that the data TT's must always be the same as the instruction TT's otherwise the code may not run properly. If this is the case then why are there different instruction and data TT's ? Note that the translation table structure of the MC68040 MMU does not distinguish between data and instruction. -- Dolf Grunbauer Tel: +31 55 433233 Internet dolf@idca.tds.philips.nl Philips Telecommunication and Data Systems UUCP ....!mcsun!philapd!dolf Dept. SSP, P.O. Box 245, 7300 AE Apeldoorn, The Netherlands n n n It's a pity my .signature is too small to show you my solution of a + b = c