jonah@db.toronto.edu (Jeff Lee) (04/14/90)
In article <11176@portia.Stanford.EDU> underdog@portia.Stanford.EDU (Dwight Joe) writes: >|In article <1990Apr13.230144.25650@athena.mit.edu> >|kpchan@athena.mit.edu (Kai P Chan) writes: >|| >||You (= Dwight Joe) think 80x86 or 680x0 are high-tech stuffs? In my opinion, >||they are just the same old technology scaled up. They just put everything >||(e.g. caching, math co-processor etc.)on chip! >Maybe. But both Intel and Motorola has caught-on to RISC. >In the latest versions of the 80x86 and the 680x0, the logic >circuits have been redesigned so that the most frequently used >instructions can now execute in 1 or 2 cycles max. Ah pardon me, but the 80486 and 68040 are RISKY not RISCy. At that level of parallism and complexity, exception handling becomes very difficult. Executing the most frequently used instructions in 1 or 2 cycles is just ONE SMALL PART of the RISC design philosophy. As John Mashey is fond of saying in his car/computer analogy : "The faster you go, the harder it is to stop" to which I would add "or to change direction safely." The lastest CISCs often have design flaws (aka hardware bugs) related to unusual and infrequent combinations of such things as interrupts, exceptions, extension words, unaligned access, out-of-order read/write, aggressive pipelines, and intruction continuation/restart/abort. The extra complexity is putting you at RISK not at RISC. In computing as with driving, I would rather go slightly slower and be safe than go a bit faster and take a chance at skidding out of control once in a while. >In article <19812@mephisto.UUCP> cheung@bison.UUCP (Shun Yan Cheung) writes: >|To be completely honest, there is not much advances in the Von Neumann >|achitecture since its conception. Perhaps not, but things sure run a lot faster than they used to. --- Jeff Lee | Pipelined CISC: is it worth the RISK?
mmm@cup.portal.com (Mark Robert Thorson) (04/15/90)
I think the 486 generates a 2X clock on-chip, so it doesn't really qualify as a one/two-clock-per-instruction chip. I'd be surprised if the 68040 was any different.