[comp.arch] Seeking advice on Transputer config. for signal proc.

swank@dip.eecs.umich.edu (Thomas E. Ragland) (05/07/90)

Dear Netters,

   I'm currently seeking the assistance and advice from anyone that  results answer
several questions that I have.  The problem area is the transputer and ientcy
ability to be embedded into products relying on signal processing.  For
instance, based on the theory of concurrecy, we're trying to develop design
approaches for a transputer architecture.  Therefore, can someone in *netland*
help resolve the following?  The problem of interest is as follows, we would
like to develop a specialized high speed parallel computer system for signal
processing applications.  However, complex systems based on the *transputer*
can be constructed without truly realizing their operational behavior. 
Moreover, *transputer* technology, and its accompanying languages, and simulations do not, by themselves, provide sufficient assurances that important liveness
and safety properties are fully satisfied, or that the best design has been
developed.  For expressing the above, we are considering several configurations
based on current technology, namely, a Banyan network.  Has anyone pursed 
signal processing/analysis on such an architecture?  If so, were the          
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, formal analysis methods, algorithm design suggest feasible practical
approaches to predicting the safety and liveness properties of *transputer*
based systems.  Finally, can anyoone in *netland* help expedite our research
efforts by providing, references, citing(s), personal suggestions on 
developing *optimal* configurations based on the *transputer* for signal 
processing?  Thanks in advance to all!
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Thomas E. Ragland
RTCL (Real-Time Computing Lab)
Dept. of EECS 
The University of Michigan
Ann Arbor, Michigan  48109-2122

Phone:  (313) 763-4424
E-Mail: swank@dip.eecs.umich.edu

Regards,