ycshin@acsu.Buffalo.EDU (YongChul Shin) (05/08/90)
I am working on a simulation of RAM's and ROM's, and making VHDL descriptions of the existing memory IC's based on manufacturer's data manuals. Is there any such a behavioral model in VHDL provided from IC manufacturers ? Otherwise, could someone send me a working model that I can access. Thank you in advance. == Yong-Chul Shin ycshin@cs.buffalo.edu == == 201 Bell Hall, Dept. of Electrical and Computer Engineering == == State University of New York at Buffalo, Buffalo, NY 14260 ==