amull@Morgan.COM (Andrew P. Mullhaupt) (06/04/90)
We have an application which carefully arranges for data to begin on the same low order address bits. When we run this application on machines with direct mapped caches, we get more collisions than we would otherwise expect. We are considering simple solutions, like randomly offsetting the low order bits by the size of a cache line when allocating data, but I'd like to know if other solutions are to be preferred. Thanks in advance, Andrew Mullhaupt