[comp.arch] Fast Data transfer between ATs

rda903l@monu6.cc.monash.oz (m.c. 8846372 vella) (05/26/90)

I need to perform some fast transfer of large (<128Kb) chunks
of memory between two IBM AT clones. I have an optic fibre link
capable of 100Mbps, but I need to get the data in memory to/from
the boards. Is DMA the fastest way to transfer data between my board
and memory?
	If so, are there any references around on DMA on the IBM AT?
	If not, which way is faster, and are there any references
	on this?

Thanks in advance,

		Matthew Vella

jon@hitachi.uucp (Jon Ryshpan) (06/12/90)

In article <1990May25.230643.11857@monu6.cc.monash.oz> rda903l@monu6.cc.monash.oz (m.c. 8846372 vella) writes:
>...	Is DMA the fastest way to transfer data between my board
>and memory?

I don't think so.  In the AT the data has to go from the peripheral to
the DMA chip and then out of the DMA chip into memory.  Very often the
CPU can do this faster.  This can be the best way if the CPU doesn't
have anything better to do (very common under DOS) or if you really want
the *fastest* data transfer possible.

Some but not all of the implementations of the AT bus support transfer
of bus mastership.  On such a backplane, DMA would be fastest.

Jonathan Ryshpan		<...!uunet!hitachi!jon>

phil@pepsi.amd.com (Phil Ngai) (06/13/90)

In article <452@hitachi.uucp> jon@hitachi.UUCP (Jon Ryshpan) writes:
|I don't think so.  In the AT the data has to go from the peripheral to
|the DMA chip and then out of the DMA chip into memory.  Very often the

Sorry, this is not correct. PC DMA is actually clever in some ways.
The DMA transfer is quite efficient in design, using "flyby" cycles
where the source (IO or memory) puts the data on the bus and the
receiver (memory or IO, must be the opposite of the source) takes
the data off the bus in the same cycle.

The big problem is that the DMA controller runs so slower that
indeed the CPU can often transfer data faster.


--
Phil Ngai, phil@amd.com		{uunet,decwrl,ucbvax}!amdcad!phil