[comp.arch] Why RAMs are 1 bit wide

yarvin-norman@CS.YALE.EDU (Norman Yarvin) (06/14/90)

In article <1990Jun13.051957.17219@portia.Stanford.EDU> dhinds@portia.Stanford.EDU (David Hinds) writes:

>     It isn't clear to me why DRAM's are nearly always bit-wide or nibble-
>wide, besides tradition.

A couple of reasons come to mind:

To make external address decode easier.  Building an 8-bit-wide 256K byte
memory module with 256K x 1 chips requires no external address decode; all
the chips can be enabled whenever you're accessing memory.  Building it with
32K x 8 chips requires you to have a decoder feeding the enable lines --
an extra chip and reduced speed.

To reduce pin count.  A 256K x 1 chip needs 18 address bits and one data
bit; a 32Kx8 chip needs 15 address bits and 8 data bits.  That's 4 more bits
that have to go into/out of the chip for each access.
--
Norman Yarvin				yarvin-norman@cs.yale.edu
  "Obviously crime pays, or there'd be no crime." -- G. Gordon Liddy