[comp.arch] Scalable Coherent Interface Protocol

ttl@astroatc.UUCP (Tony Laundrie) (09/01/90)

I'm just wondering what the net's opinion is on SCIP, formerly called
SCI.  Here's a brief introduction:

SCIP

The
.i
Scalable Coherent Interface Protocol (SCIP),
.r
IEEE P1596, is
a STANDARD to enable smooth system growth with
MODULAR COMPONENTS from many vendors.  It features one
GigaByte/second/processor
system flux,
DISTRIBUTED SHARED MEMORY, optional directory-based
CACHE COHERENCE, and
MESSAGE PASSING mechanisms, too.
It is SCALABLE from 1 to 64K processors, with
16-bit 2ns unidirectional data links for building complex
SWITCH NETWORKS for VLSI machines or cheap
REGISTER INSERTION RINGS for PCs.
Serial FIBER OPTIC links and Tri-ax links are provided, as well as
INTERFACE MECHANISMS to other buses and an
I/O and CSR ARCHITECTURE that is shared with
Futurebus+ (P896.x) and SerialBus (P1394).
.pp
The base standard is nearing completion, and should
be submitted to the IEEE for approval in 1990.  Commercial products,
including interface chips (which will be made available to all)
are already being designed to the
.i
SCIP
.r
draft specifications.
.pp
.i
SCIP
.r
documents are available electronically via anonymous FTP from
HPLSCI.HPL.HP.COM, except for a few documents which are paper only.
Online formats are Macintosh Word 4 (Stuffit'd) and PostScript.
The PostScript includes Unix compressed and uncompressed forms, and
must be prepended with a LaserPrep file containing macro definitions
(which is also online).
Paper documents can be ordered from Kinko's Copy Service, Palo Alto,
California, (415) 328-3381.  Various payment forms can be arranged.
Newcomers should order the latest mailing plus the package NEW, which
contains the most essential documents from previous mailings.
.pp
Send your name, mailing address, phone number, fax number, email
address, to me and I will put you on a list of people to be notified
when new mailings are available; you will also be listed in an
occasional directory of people who are participating in or observing
.i
SCIP
.r
development.
.lp
David B. Gustavson
.br
IEEE P1596 Chairman
.br
Stanford Linear Accelerator Center
.br
Computation Research Group
.br
P.O.Box 4349, Bin 88
.br
Stanford, CA  94309
.br
(415)926-2863
.br
dbg@slacvm.slac.stanford.edu
.pp
Meetings are open to the public.  Usually there are tutorial
presentations in the morning of the first day of a meeting.  So far we
have not required prior notice of your attendance, but it would be wise
to let the host know if you plan to attend so that he/she can make an
estimate of attendance in order to secure a room of adequate size, with
sufficient refreshments.
.pp
The next meeting is September 18, 19 and 20 at BB&N in Boston, with
related work on the Control and Status Register Architecture on
September 21.  Host is Randy Rettberg, (617) 873-3538, rettberg@bbn.com.
The Microprocessor Standards Committee meets in Pittsburgh evening of
September 24th, with many other standards activities there that week.
.pp
Future meetings (tentative):
October 17-19, final editing session; Santa Clara California area.
November 12-14, submit first level of SCIP to MSC for ballotting, begin
work on extensions.  Santa Clara area, MSC evening of 12th.
January 14-16 Santa Clara area, MSC evening of 14th.
February or March, Geneva Switzerland.
April 11, 12, in conjunction with ASPLOS IV, near Santa Clara.
.pp
This schedule has a disproportionate number of meetings in the Santa
Clara area because of the MSC meetings there on alternate months; we
will try to meet more in other areas soon, but this period is critical
for
.i
SCIP
.r
so we are highly constrained.