grunwald@foobar.colorado.edu (Dirk Grunwald) (09/19/90)
me 'n the boys was sittin' round today wondering how anyone was going multiport a SPARC register file enough to make a superscalar SPARC machine. Only way we could think of was to get bigger silicon or reduce the number of windows. The current crop of SPARC implementations don't fare well on the CPI count, and superscalar would appear to be the logical step (unless they're not doing something that everyone else is doing). So we got to wondering just how much measurable advantage the register windows have. Granted, we've read the RISC I/II papers and Stankovics register-windows-are-good-for-lisp-but-only-by-10% paper, but it would seem easy to change 'gcc' to use a single register window and avoid register save/restore traps. In particular applications, e.g., a threads package, this might save a lot of context saving time, since, although you still need to invoke a window flushing trap (unless you compile everything with the new compiler), the trap probably won't do anything. So, has anyone changed the tm-sparc.h file in gcc to do this? Have you run comparison benchmarks w.r.t. full windowing sparc? If I'm correct, you *should* be still able to call library routines and the like; only new code would not use register windows. Dirk Grunwald -- Univ. of Colorado at Boulder (grunwald@foobar.colorado.edu) (grunwald@boulder.colorado.edu)
khb@chiba.Eng.Sun.COM (Keith Bierman - SPD Advanced Languages) (09/20/90)
In article <26509@boulder.Colorado.EDU> grunwald@foobar.colorado.edu (Dirk Grunwald) writes:
me 'n the boys was sittin' round today wondering how anyone was going
multiport a SPARC register file enough to make a superscalar SPARC
machine. Only way we could think of was to get bigger silicon or
reduce the number of windows. ....
At the IEEE HOT CHIPS forum, LSI/Metaflow presented a paper on a
superscalar SPARC with (if memory serves) 4 functional units and at
least 7 register windows. Even more interesting is its out of order
execution model...
--
----------------------------------------------------------------
Keith H. Bierman kbierman@Eng.Sun.COM | khb@chiba.Eng.Sun.COM
SMI 2550 Garcia 12-33 | (415 336 2648)
Mountain View, CA 94043