cafe@cbnewse.att.com (richard.dib) (10/12/90)
Hi everybody : I am a student at the University of Wisconsin - Madison. We are working in a computer architecture project and we would like to know your opinion about a few things. You know that microprocesors have grown from 8 bits to 16 bits to 32 bits. What do you think about the posibility of larger word and instruction sizes? Do we need a 64 bits microprocesors? If so, what applications do you think will demand this increased word size? Do you think that the future machines will feature 64 bits microprocesors? If you know about any papers or articles that talk about this issue please notify us. Thanks in advance for your help! Richard Dib University of Wisconsin - Madison
mash@mips.COM (John Mashey) (10/14/90)
In article <1990Oct12.064324.24421@cbnewse.att.com> cafe@cbnewse.att.com (richard.dib) writes: ..... > You know that microprocesors have grown from 8 bits to 16 bits to >32 bits. What do you think about the posibility of larger word and >instruction sizes? Do we need a 64 bits microprocesors? If so, what >applications do you think will demand this increased word size? >Do you think that the future machines will feature 64 bits microprocesors? The panel session ending the recent Microprocessor Forum addressed this as one of the topics. 1) Anybody with an opinion on it believes that 64-bits will become a must, and that it's the only new Instruction Set Architecture issue of much interest over the next 5 years, i.e.: a) New 32-bit ISAs aren't very interesting. b) There's probably no sensisble way to make a 32-bit architecture do real 64-bit stuff (real = 64-bit ints and pointers, not necessarily 64-bit instructions) c) There probably are sensible ways to have 32-bit machines with 64-bit modes, whose 32-bit mode is upward-compatible from existing machines. At least one vendor promised this would happen, although no details were given. An interesting issue for the next round is whether or not this is done by essentially building 2 CPUs together on the die, or whether there's an reasoanble way to merge them together. Intel history may provide some insight on this one. 2) Norm Jouppi said he thought it would be 1-2 years away; I said no later than 1993 (meaning, buy systems in 1993 that had both hardware that could do this, and software support). This sounds like we more or less agree; I can't remember if anyone else was this specific. (Norm: if you're reading, could you post the foil you put up about the EE aspects of going fast, and explain it a little more for comp.arch. (Norm had an interesting counterview to the superscalar/speculative-execution discussions, i.e. he wanted CPUs to stay simpler in order to go fast.) 3) From the various comments, one would gather that various vendors must be working on the problem, probably not for next years' CPUs, but for the next rev after that, especially the 3-4M transistor ones. -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086