bs@linus.mitre.org (Robert D. Silverman) (10/29/90)
In article <1990Oct27.230837.1580@sbcs.sunysb.edu> mhenz@sbcs.sunysb.edu (Martin Henz) writes:
:I am sitting in front of a SUN 3/50M-4 and would like
:to know some details about it's cache memory.
:I know that it's 68020 has 256 byte i-cache on chip.
:I don't know what's off chip.
:
:Do you know? Thank you,
The SUN 3/50, 3/75, and 3/60 are all cacheless architectures. There
is no data cache.
--
Bob Silverman
#include <std.disclaimer>
Mitre Corporation, Bedford, MA 01730
"You can lead a horse's ass to knowledge, but you can't make him think"