DBG@SLACVM.SLAC.STANFORD.EDU (12/17/90)
The Fastbus specification is widely sold in bookstores, though perhaps
not the 960-1989 revision that is in one volume with the 1177-1989
Fastbus standard software interface.
The revision mainly differs in details and errata from the 1986 version,
however, so that one would probably be good enough for your purposes.
The Futurebus specification is being heavily edited at present in order
to document the new arbitration method etc., so I don't think anyone has
an up-to-date copy, much less one for sale to the public. After the editing
is finished it will go out to ballot again, then to the IEEE for approval,
then be typeset and published.
If you are really interested in high performance you should look at one
non-bus, namely the IEEE P1596 Scalable Coherent Interconnect. It provides
bus-like services but uses a collection of unidirectional links and packet
protocols to do it (not visible to the casual user). The fundamental point of
a bus is to make sure only one transfer takes place at a time, and that is
just not fast enough for interesting machines anymore.
On the other hand, SCI won't be really available until next summer when the
silicon protocol/transceiver chip is finished. It's only running in simulation
and breadboards now. Fastbus exists by the thousands of crates and thousands
of bridges, but mostly in big laboratories. Futurebus is reported in the
press to be widely available from many vendors already, though all I have
personally seen is transceiver chips and mock-ups.
If you do want to broaden your thesis topic enough to include a non-bus
bus, the following tells you two ways to get the information you want.
-
What is SCI?
The Scalable Coherent Interface, IEEE P1596.
-
a STANDARD to enable smooth system growth with
MODULAR COMPONENTS from many vendors
1 GigaByte/second/processor system flux,
DISTRIBUTED SHARED MEMORY, & optional
CACHE COHERENCE, directory-based, &
MESSAGE PASSING mechanisms too.
SCALABLE from 1 through 64K processors.
16-bit 2ns unidirectional data links, for building
SWITCH NETWORKS of finite VLSI, and cheap
REGISTER INSERTION RINGS for PCs, workstations, etc.
Serial FIBER OPTIC links, Co-axial links too.
INTERFACE MECHANISMS to other buses (P1596.1 VME Bridge in progress),
an I/O and CSR ARCHITECTURE (IEEE P1212) shared with
Futurebus+ (P896.x) and SerialBus (P1394).
-
Current status: the base standard is nearing completion, and should
be submitted to the IEEE for approval in Jan. 1991. Commercial products
are already being designed to the SCI draft specifications.
-
SCI documents are available electronically via anonymous FTP from
HPLSCI.HPL.HP.COM, except for a few documents which are paper only.
Online formats are Macintosh Word 4 (Compacted,self expg) and PostScript.
The PostScript includes Unix compressed and uncompressed forms, and
must be prepended with a LaserPrep file containing macro definitions
(which is also online).
Paper documents can be ordered from Kinko's Copy Service, Palo Alto,
California, (415)328-3381. Various payment forms can be arranged.
Newcomers should order the latest mailing plus the package NEW, which
contains the most essential documents from previous mailings.
SCI depends on the IEEE P1212 CSR Architecture as well, so you will
also need a copy of that, which is available from the same sources.
-
Send your name, mailing address, phone number, fax number, email
address, to me and I will put you on a list of people to be notified
when new mailings are available; you will also be listed in an
occasional directory of people who are participating in or observing
SCI development.
-
Contact:
-
David B. Gustavson
IEEE P1596 Chairman
Stanford Linear Accelerator Center
Computation Research Group
P.O.Box 4349, Bin 88
Stanford, CA 94309
(415)926-2863 or dbg@slacvm.slac.stanford.edu
Meetings are open to the public. Usually there are tutorial
presentations in the morning of the first day of a meeting. So far we
have not required prior notice of your attendance, but it would be wise
to let the host know if you plan to attend so that he/she can make an
estimate of attendance in order to secure a room of adequate size, with
sufficient refreshments.
The next meeting is January 14, 15, 16 at Unisys in San Jose, CA.
Our host is Michael Koster, (408)435-3252, or mikek@ios.convergent.com
We plan to submit the document to the MSC for ballot the evening of
the 14th, so will postpone any tutorial to 15th this time because we
will want to spend the 14th on final inspection.
Work on extensions for very large systems will begin on the 15th, and
there will be a P1596.1 Bridge to VME meeting on the 16th (probably
in the afternoon.)
Meetings run from 9 to 6 usually.
Future meetings (tentative):
February 13-15, CERN, Geneva Switzerland.
April 11, 12, in conjunction with ASPLOS IV, near Santa Clara.
end May, near 18th ISCA Computer Architecture in Toronto,
early June at Dolphin Server Technology, in Oslo, Norway.
-- David B. Gustavson, Computation Research Group, SLAC, POB 4349 MS 88,
Stanford, CA 94309 tel (415)926-2863 fax (415)961-3530
-- What the world needs next is a Scalable Coherent Interface!
-- Any opinions expressed are mine and not necessarily those
of the Stanford Linear Accelerator Center, the University, or the DOE.