[comp.arch] registerless architectures

scottl@convergent.com (Scott Lurndal) (01/09/91)

The Burroughs Medium Systems (now UNISYS V-Series) line was one of the first
registerless architectures created (sometime in the mid-1960's).  It consists
of a memory-to-memory variable operand instruction set heavily oriented towards
COBOL programs (generally speaking, there is a one-to-one correspondence between
COBOL verbs and instructions).   Each instruction consists of a 1-byte opcode, 
1-byte A- and B-operand length fields (BCD) and from one to three operands.  For
example, and add instruction would be encoded as "02 10 10 000100 000200 000300"
which means, add a 10-digit (BCD) field from address 100 to that at address 200
storing the result at address 300. (even addresses are BCD! - makes debugging 
and object patching a snap). An arithmetic operand could be from 1 to 100 BCD
digits in length.
 
Recognizing the fact that indexing from a base
address is a useful address mode,  three 8-digit fields in memory (at address 
8, 16 and 24) were designated as "index-registers" - note that although they are
referred to as registers, they are simply main-memory.   The high-order bits of
an operand (e.g. x00100 above) were used to encode the data type (Unsigned 
Numeric, Signed Numeric, Unsigned Alphabetic, or Indirect address - two bits), 
and the index register to be used (none, 1, 2 or 3).

With the appropriate cache (added to later V-series models e.g. V530/V560), very
good COBOL performance could be achieved without any registers at all.

In 1985 the architecture was extended to allow greater amounts of memory to be
addressed by a single program (had been limited to 500Kbytes).  The mechanism
used necessitated the addition of 4 more index registers.  These were not 
a part of main memory, rather they were kept in microcode scratch dram, and
loaded/stored with specialized instructions, load or store index register.  Note
that these registers were still only used for indexing, not for arithmetic!

To diverge to the microcoding thread, I include the following:

At this point, since the instruction set became microcoded with the Bx900 
series and all V-series, instructions were added to handle both mutual
exclusion and synchronization for the operating system.  These instructions
were very high-level (e.g. "LOCK", "UNLOCK" to protect a critical region,
with tasks (processes) being blocked automagically, and "WAIT","RESET" & "CAUSE"
to handle synchronization, again, with the ucode handling most of the 
process blocking/unblocking).

One final note - programs compiled in 1967 for this machine will still run 
unchanged on the most recent models, under a completely re-written operating
system.   Now THAT's binary compatability.


Scott Lurndal                              scottl@convergent.com
UNISYS Unix Systems Group                  uunet!pyramid!ctnews!pase70!scottl
Motorola (RISC) platform division