[comp.arch] Electronic weapons -- uP of choice?

roger@hpnmdla.HP.COM (Roger Petersen) (01/17/91)

Well, now that the War on Iraq has begun,
and all the high tech weapons are in action,
here's a related question:

	What is the microprocessor of choice
	for smart missiles and bombs?


When I interviewed with Motorola several years ago,
they were designing CPU boards with 680x0s for 
the tips of missiles and anti-tank weapons.
The boards had to be capable of sustaining a 60g force.

Anybody know the latest?

Roger

jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) (01/18/91)

From article <7410002@hpnmdla.HP.COM>,
by roger@hpnmdla.HP.COM (Roger Petersen):
> 
> 	What is the microprocessor of choice
> 	for smart missiles and bombs?

When I was consulting with Rockwell Avionics, they were using their
proprietary AAMP processors in many applications (developed as the
monolithic version of their proprietary CAP minicomputer).

First generation GPS receivers had CAP processors in them, the later
generation of Rockwell GPS receivers were supposed to be based on a
(yet to be released in 1986) AAMP processor.

The CAP/AAMP architecture is one of the best examples of a modern
descendant of the Burroughs stack architecture I've ever seen.  It's
also fast.  My 1986 AAMP manual has it doing 200 Whetstones/second
when clocked at 20 Mhz using 300 ns memory and dissapating 15 watts.
It was one of the first microprocessors I know of to have on-chip
floating point hardware.
					Doug Jones
					jones@cs.uiowa.edu

(Disclaimer:  I haven't been associated with Rockwell since 1986,
              things might have changed since then.)

sam@aten.cca.rok.com (01/19/91)

>Doug Jones Said:
>My 1986 AAMP manual has it doing 200 Whetstones/second when
>clocked at 20 Mhz using 300 ns memory and dissapating 15 watts.

More accurate information follows:

Advanced Architecture Microprocessor  (AAMP)

Built by                : Rockwell International
Technology          : Bulk CMOS, CMOS/SOS, two-micron gate length
Architecture         : Stack-oriented, with nested, recursive procedures,
                               supporting real-time multitasking
Data Types           : Bit, byte, Boolean, 16-, 32-bit integer and
                               fractional, 32-, 48-bit floating-point
Instructions          : 153
Addressability      : 33,554,432 words of data
                                67,108,864 bytes of code.
Throughput           : 20 MHz. 1.8 MIPS maximum
Clock                     : Crystal or external, 20 MHz.
Supply voltage      : 5.0 +/- 0.5 volts DC
Power dissipation : 200 milliwatts maximum
Interface               : TTL and CMOS compatible
Temp Range          : -55 to +125 degrees Celsius

-----------------------------------------------

Advanced Architecture Microprocessor II  (AAMP2)

Built by               : Rockwell International
Technology         : Bulk CMOS, 1.6 micron gate length
                              30 MHz 1.0 micron parts are being tested.
Architecture        : Stack-oriented, with nested, recursive procedures,
                              supporting real-time multitasking
Data Types          : Bit, byte, Boolean, 16-, 32-bit integer and
                               fractional, 32-, 48-bit floating-point
Instructions          : 209
Addressability     : 33,554,432 words of data
                               67,108,864 bytes of code.
Clock                     : Crystal or external, 20 MHz,
                               (30 Mhz being evaluated)
Supply voltage     : 5.0 +/- 0.5 volts DC
Power dissipation : 200 milliwatts maximum
Interface               : TTL and CMOS compatible
Temp Range          : -55 to +125 degrees Celsius
-----------------------------------------------
Contact:  John Gee
               MS: 124-211
               Rockwell International Corporation
              400 Collins Road NE
              Cedar Rapids, Iowa 52498
              FAX: (319) 395-3292
 
S A McConnell  Rockwell Int.  Internet: sam%gva.decnet@consrt.rok.com

ken@dali.gatech.edu (Ken Seefried iii) (01/22/91)

-----

Where does the 1750A fit into all of this?  I thought there was some
sort of `mandate' (a la Ada) the 1750A was to be used for all military
computers...

--
	ken seefried iii	"A sneer, a snarl, a whip that
	ken@dali.cc.gatech.edu	 stings...these are a few of
				 my favorite things..."

carters@ajpo.sei.cmu.edu (Scott Carter) (01/23/91)

In article <7410002@hpnmdla.HP.COM> roger@hpnmdla.HP.COM (Roger Petersen) writes:
>	What is the microprocessor of choice
>	for smart missiles and bombs?
>
>When I interviewed with Motorola several years ago,
>they were designing CPU boards with 680x0s for 
>the tips of missiles and anti-tank weapons.
>The boards had to be capable of sustaining a 60g force.
>
Yes, some of the smart weapons being used in the Gulf do have 680x0s in them.
No, I won't name them.

Scott Carter - McDonnell Douglas Electronic Systems Company
carter%csvax.decnet@mdcgwy.mdc.com (preferred and faster) - or -
carters@ajpo.sei.cmu.edu		 (714)-896-3097
The opinions expressed herein are solely those of the author, and are not
necessarily those of McDonnell Douglas.