kirchner@informatik.uni-kl.de (Reinhard Kirchner) (01/24/91)
Hello World, there is a 32-bit processor called Hyperstone, which was developed by a small company here in Germany, and will, as far as I know, be manufactured by Zilog. We had recently a discussion here on it, and now I want to ask You all: Is it known at all ? What to people, especially our gurus, think about its architecture and other technical features ? ( If it is known, of course ) ? I can't type in the user's manual here, so I have to ask those who already have at least heard about it. This is an important information by itself. It is clear that Hyperstone will neither replace i80x86 ( -:( ) nor x8000 nor Sparc nor Mips etc., so I do not even ask for its chances in the market. Reinhard Kirchner Univ. of Kaiserslautern, Germany kirchner@uklirb.informatik.uni-kl.de -----------------------------------------for the line eater ----------
mash@mips.COM (John Mashey) (01/26/91)
In article <7481@uklirb.informatik.uni-kl.de> kirchner@informatik.uni-kl.de (Reinhard Kirchner) writes: > >Hello World, > >there is a 32-bit processor called Hyperstone, which was developed by a small >company here in Germany, and will, as far as I know, be manufactured by >Zilog. > >We had recently a discussion here on it, and now I want to ask You all: > >Is it known at all ? > >What to people, especially our gurus, think about its architecture and other >technical features ? ( If it is known, of course ) ? > >I can't type in the user's manual here, so I have to ask those who already >have at least heard about it. This is an important information by itself. > >It is clear that Hyperstone will neither replace i80x86 ( -:( ) nor x8000 nor >Sparc nor Mips etc., so I do not even ask for its chances in the market. I don't think it's very well-known in the U.S. I've read a short description by Otto Muller from RISC'90 in Karlsruhe, which is about hte only public thing that I've seen lately. Like 68K, Clipper, etc, it has 16, 32, and 48 bit- instructions. It has a 2-stage (at least I think that's what "Zweistifige Pipeline" means, and is claimed to be 25 MIPS with standrd DRAMs and 40 MIPS with SRAMs, although I'm not sure what the idea of MIPS is; soem numbers were given for very small benchmarks of the Dhrystone/ Whetstone variety. The current impleentation is clearly geared for embedded control, as it has a small cache, DRAM-controller with RAS/CAS-Mux, referesh-logic, parity-logic, and a bunch of other things for minimal chip count. Has 85K transistors, 144-pin PGA, with Qaud-FLat Pack in development. C compiler & debugger, running on PC, available end of January. --------- In general, it sort of looked OK to me, but as Hr. Kirchner says, not likely to replace the others. In general, it will have to compete with: 68xxx 683xx (embedded variants) Intel i960s, and maybe cheaper X86s. MIPS, especially the IDT 3051/3052, and LSI embedded variants embedded SPARC variants (maybe) AMD 29K, especially lower-end ones I couldn't really see if it had any compelling advantage versus these things, so maybe somebody could post some, as my information is fairly minimal, as the info I have is fairly short. There are of course more niches in the embedded world than in the general systems world. -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
mslater@cup.portal.com (Michael Z Slater) (01/28/91)
Hyperstone looks like a fairly interesting architecture, but it's not clear that it has enough advantages to make it stand out among the dozen or more contenders already in the market. Zilog licensed it because they say it had a smaller CPU core than anything else with comparable performance. Zilog will sell the CPU chip, but doesn't plan to actively promote it by itself. They will use the CPU core as part of intelligent peripheral chips. As far as I know, only Hyperstone Electronics in W. Germany will actively promote it. I wrote a moderately detailed article describing the architecture that was published in the September 19, 1990 issue of Microprocessor Report. Michael Slater, Microprocessor Report mslater@cup.portal.com
newton@ils.nwu.edu (David Newton) (01/30/91)
Well, I've certainly heard of it, there is an ad for it in most recent issues of "Embedded Systems Programming", and there was a brief blurb in the latest issue. I am curious about it because of its apparently high performance using slow DRAMS... I'm an intermediate hardware hacker and like to play, can't do a lot of things, but if this works like the ad says it will work, it could be a fun little embedded-systems component. Just my $.02... -- David L. Newton | Work: (708) 491-4791 | newton@ils.nwu.edu -or- ILS, Room 327 | Home: (708) 332-2321 | dnewton@carroll1.cc.edu, but 1890 Maple St. |------------------------| this just is forwarded to the Evanston, IL 60201 |________________________| top address, so don't bother.